VXI SM8000 user manual Trace RAM Control Register Read and Write

Page 45

VXI Technology, Inc.

Trace RAM Control Register – Read and Write

ADDR

Plug-In LA+0x3A

 

 

 

D15 is for module 5 ... D10 is for module 0. Set to 0 if the module

 

 

is installed or set to a 1 if not installed. These bits are set to 0 at

D15-D10

Modules Installed

power on. By setting a 1, the SMIP II Interface PCB will generate

 

 

DTACK* for any read or write cycles to the memory space of the

 

 

uninstalled plug-in modules.

D9-D4

Modules used in

D9 is for module 5 ... D4 is for module 0. Set to 1 if the module is

trace mode

used in trace mode, set to 0 if not in trace mode.

 

D3-D2

Unused

Data written to these bits have no effect. The value written is read

back.

 

 

 

 

1 = enabled

 

 

0 = disabled

D1

LOOP ENABLE

If enabled, the trace resumes at the start of active RAM and

 

 

 

 

continues from there. If disabled, the trace stops at the end of

 

 

active RAM and clears the TRACE ENABLE bit.

 

 

1 = enabled

D0

TRACE ENABLE

0 = disabled

If the LOOP ENABLE bit is set and the end of active trace RAM

 

 

 

 

is reached, this bit will not be reset.

Busy Trigger Control Register – Read and Write

ADDR

Plug-In LA+0x3C

 

 

 

Sets the TTLTRIG Line or Lines, which are configured as outputs,

 

 

and will toggle at the de-assertion of a Board Busy condition sent

D15-D8

TTLTRIG Select

by the plug-in modules. D15 corresponds to TTLTRIG7, D14 to

TTLTRIG6, … and D8 to TTLTRIG0. Setting a bit to a 1, enables

 

 

the trigger line, setting a bit to a 0, disables the corresponding line.

 

 

All bits are set to 0's when either a soft or a hard reset is received

 

 

by the module.

D7-D6

Unused

Data written to these bits have no effect. The value written is read

back.

 

 

 

 

Enables the Board Busy signals received from the plug-in modules

 

 

to generate a trigger condition on the TTL Trigger Bus. D5

 

 

corresponds to Board Busy Module 5, D4 to Board Busy Module

 

 

4, … and D0 to Board Busy Module 0. Setting a bit to a 1, enables

 

 

the generation of a Trigger condition, setting a bit to a 0, disables

D5-D0

Busy Trigger

the corresponding line. All bits are set to 0's when either a soft or a

hard reset is received by the module.

Enable

 

 

 

 

Software can be written to enable the last board updated to

 

 

generate the TTLTrigger condition, alerting any other instruments

 

 

that the plug0in modules' relays have settled. Alternatively, all of

 

 

the plug-in modules may be enabled to generate the TTLTrigger

 

 

condition.

SM8000 Series Programming

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Contents SM8000 Series VXI Technology, Inc Table of Contents Control Modes VXI Technology, Inc SM8000 Series Preface Certification Steve Mauga, QA Manager EMCVXI Technology, Inc SM8000 Series Preface Terms and Symbols Service should only be performed by qualified personnelAvoid Electric Shock Support Resources VXI Technology, Inc SM8000 Series Preface Overview SectionSM8000 Series Optical Switch Controller Configurations SM8001 / SM8002 MULTI-CHANNELSWITCHESDuplex 1 x N PDL6 SM8001 / SM8002 Multi Switch SpecificationsSpdt SM8003 Prism SwitchesPDL3 SM8003 Prism Switch SpecificationsPDL SM8101 / SM8102 Optical AttenuatorsCalculating System Power and Cooling Requirements Setting the Chassis Backplane JumpersIntroduction Setting the Logical Address ExampleMSB LSB Selecting the Extended Memory Space Cleaning Optical Connectors Mating Optical ConnectorsOptical Connections General Description SM8001 / SM8002 Multi-Channel SwitchesSM8003 Prism Switches SM8003 Prism SwitchesSM8101 / SM8102 Optical Attenuators Attenuator DiagramResetting the Switch OperationRelay Registers Output Channel Selection N Switch Configuration Common Active Channel Duplex 1 x N Switch ConfigurationN Blocking Switch Configuration N Non-Blocking Switch Configuration 8MULTI-SWITCH Timing Calculating Switching TimeSM8003 Prism Switches Control Modes Starting the DeviceUncalibrated Operation Move-To-Absolute-Step Calibrated OperationError Status Busy SignalResetting the Device Commanding the DevicesAddressing Register AccessOffset Write Function Smip II Register MAP A16Logical Address Register Write Only ID Register Read OnlyDevice Type Register Read Only Status Register Read OnlyOffset Register Read and Write Control Register Write OnlySerial Number High Register Read Only Serial Number Low Register Read OnlyInterrupt Status Register Read Only Interrupt Control Register Read and WriteSubclass Register Read Only NVM Access Register Write NVM Access Register ReadBoard X, Y Used Address Register Read and Write Trace RAM Start High Register Read and WriteTrace RAM End Low Register Read and Write Trace RAM End High Register Read and WriteTrace RAM Address High Register Read and Write Trace RAM Address LOW Register Read and WriteTTL Trigger Polarity Register Write Only Open Trigger Select Register Write OnlyBusy Trigger Control Register Read and Write Trace RAM Control Register Read and WriteTrigger Advance Register Write Only Board Busy Register Read OnlyReserved Registers Read and Write 1MB RAM Control Register Read and Write See Typical Optical Multi Switch OperationControl Register Delay Register Read and Write Plug-In LA+0x104 Command Register Write Only Address Register Write Only Relay Register Offset Device MemoryWriting to the Relay Registers Relay Register 00 Read and WriteRelay Optical Module’s Data Attenuation Level Register 02 thru 08 Read and WriteRegister 0A thru 0C Read Programming Examples Typical Optical MULTI-SWITCH Control ExampleWrite Typical Optical Attenuator Control ExampleVXI Technology, Inc Read Example Write ExampleCommand Transmit Data Receive Data Byte Byte Count Command SET31h 30h35h 32h80h 6Ch82h 81h89h 83h8Bh 8Ah8Dh 8Ch8Eh 90h Recommends That the Optical MODULE’SConvert to hexadecimal A2h 96hVXI Technology, Inc SM8000 Series Programming Index VXIbus

SM8000 specifications

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