A.2.1 The PCI Interface
The PCI interface operates as a
Table A.2 and Table A.3 show the signal assignments.
Note: The + 3.3 V pins are tied together and decoupled with high frequency bypass capacitors to ground. No current from these 3.3 V pins is used on the board. The board derives power from the + 5 V pins, directly and through a 3.3 V voltage regulator. The PCI VI/O pins are used to differentiate between a 5 V or a 3.3 V PCI environment.
Technical Specifications |