CY8C20x36/46/66, CY8C20396
Table 16. 2.4V to 3.0V DC GPIO Specifications
Symbol | Description | Conditions | Min | Typ | Max | Units |
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RPU | Pull up Resistor |
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| 4 | 5.6 | 8 | kΩ |
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VOH1 | High Output Voltage | IOH < 10 μA, maximum of 10 mA | Vdd - 0.2 | – | – | V |
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| Port 2 or 3 Pins | source current in all IOs |
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VOH2 | High Output Voltage | IOH = 0.2 mA, maximum of 10 mA | Vdd - 0.4 | – | – | V |
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| Port 2 or 3 Pins | source current in all IOs |
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VOH3 | High Output Voltage | IOH < 10 μA, maximum of 10 mA | Vdd - 0.2 | – | – | V |
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| Port 0 or 1 Pins with LDO Regulator | source current in all IOs |
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| Disabled for Port 1 |
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VOH4 | High Output Voltage | IOH = 2 mA, maximum of 10 mA source | Vdd - 0.5 | – | – | V |
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| Port 0 or 1 Pins with LDO Regulator | current in all IOs |
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| Disabled for Port 1 |
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VOH5A | High Output Voltage | IOH < 10 μA, Vdd > 2.4V, maximum of | 1.50 | 1.80 | 2.1 | V |
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| Port 1 Pins with LDO Enabled for 1.8V | 20 mA source current in all IOs |
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| Out |
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VOH6A | High Output Voltage | IOH = 1 mA, Vdd > 2.4V, maximum of | 1.20 | – | – | V |
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| Port 1 Pins with LDO Enabled for 1.8V | 20 mA source current in all IOs |
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| Out |
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VOL | Low Output Voltage | IOL = 10 mA, maximum of 30 mA sink | – | – | 0.75 | V |
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| current on even port pins (for example, |
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| P0[2] and P1[4]) and 30 mA sink |
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| current on odd port pins (for example, |
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| P0[3] and P1[5]) |
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VIL | Input Low Voltage |
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| – | – | 0.72 | V |
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VIH | Input High Voltage |
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| 1.4 | – |
| V |
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VH | Input Hysteresis Voltage |
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| – | 80 | – | mV |
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IIL | Input Leakage (Absolute Value) |
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| – | 0.001 | 1 | μA |
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CPIN | Capacitive Load on Pins | Package and pin dependent | 0.5 | 1.7 | 5 | pF |
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| Temp = 25oC |
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Table 17. 1.71V to 2.4V DC GPIO Specifications |
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Symbol | Description |
| Conditions |
| Min | Typ | Max | Units |
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RPU | Pull up Resistor |
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| 4 | 5.6 | 8 | kΩ |
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VOH1 | High Output Voltage |
| IOH = 10 μA, maximum of 10 mA |
| Vdd - 0.2 | – | – | V |
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| Port 2 or 3 Pins |
| source current in all IOs |
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VOH2 | High Output Voltage |
| IOH = 0.5 mA, maximum of 10 mA |
| Vdd - 0.5 | – | – | V |
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| Port 2 or 3 Pins |
| source current in all IOs |
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VOH3 | High Output Voltage |
| IOH = 100 μA, maximum of 10 mA |
| Vdd - 0.2 | – | – | V |
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| Port 0 or 1 Pins with LDO Regulator |
| source current in all IOs |
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| Disabled for Port 1 |
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VOH4 | High Output Voltage |
| IOH = 2 mA, maximum of 10 mA source |
| Vdd - 0.5 | – | – | V |
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| Port 0 or 1 Pins with LDO Regulator |
| current in all IOs |
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| Disabled for Port 1 |
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VOL | Low Output Voltage |
| IOL = 5 mA, maximum of 20 mA sink |
| – | – | 0.4 | V |
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| current on even port pins (for example, |
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| P0[2] and P1[4]) and 30 mA sink |
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| current on odd port pins (for example, |
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| P0[3] and P1[5]) |
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VIL | Input Low Voltage |
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| – | – | 0.3 x Vdd | V |
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VIH | Input High Voltage |
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| 0.65 x Vdd | – |
| V |
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Document Number: |
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| Page 19 of 34 |
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