Cypress CY8C20396 manual Document History, Origin of Change Submission Date Description of Change

Page 33

CY8C20x36/46/66, CY8C20396

Document History Page

Document Title: CY8C20x36/46/66, CY8C20396 CapSenseTM Applications

Document Number: 001-12696

Revision

ECN

Origin of Change

Submission Date

Description of Change

**

766857

HMT

See ECN

New silicon and document (Revision **).

 

 

 

 

 

*A

1242866

HMT

See ECN

Add features. Update all applicable sections. Update specs.

 

 

 

 

Fix 24-pin QFN pinout moving pins inside. Update package

 

 

 

 

revisions. Update and add to Emulation and Programming

 

 

 

 

Accessories table.

*B

2174006

AESA

See ECN

Added 48-Pin SSOP Part Pinout

 

 

 

 

Modified symbol RVDD to RGND in Table DC Analog Mux Bus

 

 

 

 

Specification

 

 

 

 

Added footnote in Table DC Analog Mux Bus Specification

 

 

 

 

Added 16K FLASH Parts. Updated Notes, Package Diagrams

 

 

 

 

and Ordering Information table. Updated Thermal Impedance

 

 

 

 

and Solder Reflow tables

*C

2587518

TOF/JASM/MNU/

10/13/08

Converted from Preliminary to Final

 

 

HMT

 

Fixed broken links. Updated data sheet template.

 

 

 

 

Added operating voltage ranges with USB

 

 

 

 

ADC resolution changed from 10-bit to 8-bit

 

 

 

 

Included ADC specifications table

 

 

 

 

Included Comparator specification table

 

 

 

 

Included Voh7, Voh8, Voh9, Voh10 specs

 

 

 

 

Flash data retention – condition added to Note

 

 

 

 

Input leakage spec changed to 1 μA max

 

 

 

 

GPIO rise time for ports 0,1 and ports 2,3 made common

 

 

 

 

AC Programming specifications updated

 

 

 

 

Included AC Programming cycle timing diagram

 

 

 

 

AC SPI specification updated

 

 

 

 

The VIH for 3.0<Vdd<2.4 changed to 1.6 from 2.0

 

 

 

 

Added USB specification

 

 

 

 

Added SPI CLK to P1[0]

 

 

 

 

Updated package diagrams

 

 

 

 

Updated thermal impedances for QFN packages

 

 

 

 

Updated FGPIO parameter in Table 23

 

 

 

 

Updated voltage ranges for FSPIM and FSPIS in Table 30

 

 

 

 

Update Development Tools, add Designing with PSoC

 

 

 

 

Designer. Edit, fix links, notes and table format. Update RIN

 

 

 

 

formula, fix TRise parameter names in GPIO figure, fix Switch

 

 

 

 

Rate note. Update maximum data in Table 20. DC POR and

 

 

 

 

LVD Specifications.

*D

2649637

SNV/AESA

03/17/2009

Changed title to “CY8C20x36/46/66, CY8C20396

 

 

 

 

CapSense™ Applications”. Updated data sheet Features, pin

 

 

 

 

information, and ordering information sections. Updated

 

 

 

 

package diagram 001-42168 to *C.

Document Number: 001-12696 Rev. *D

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Contents Features PSoC Core Block DiagramPSoC Functional Overview PSoC CoreCapSense Analog System Additional System Resources Getting StartedPSoC Designer Software Subsystems Development ToolsDesigning with PSoC Designer Configure ComponentsSelect Components Organize and ConnectAcronyms Used Document ConventionsUnits of Measure Numeric NamingPin QFN PinoutsPin Definitions CY8C20236, CY8C20246 PSoC Device Pin Type Name Description Digital AnalogQFN Pin Definitions CY8C20396 PSoC Device 2 Pin QFN with USB PinoutQFN Pin Definitions CY8C20666 PSoC Device 2 Name DescriptionPin Digital Analog Name Description Pin Definitions CY8C20566 PSoC Device2 Pin SsopPin No Digital AnalogPin Definitions CY8C20066 PSoC Device 2 Pin QFN OCDUnits of Measure Symbol Unit of Measure Electrical SpecificationsComparator User Module Electrical Specifications ADC Electrical SpecificationsDC Accuracy Operating Temperature DC Chip-Level SpecificationsAbsolute Maximum Ratings DC General Purpose IO Specifications Low Output Voltage IOL = 10 mA, maximum of 30 mA sink High Output VoltageLow Output Voltage IOL = 5 mA, maximum of 20 mA sink Input Low Voltage VddDC Low Power Comparator Specifications DC Analog Mux Bus SpecificationsDC Programming Specifications DC POR and LVD SpecificationsAC General Purpose IO Specifications AC Chip-Level SpecificationsAC Analog Mux Bus Specifications AC Comparator SpecificationsAC Programming Specifications AC External Clock SpecificationsAC I2C Specifications AC SPI SpecificationsPin Chip On Lead 3x3 mm Sawn Packaging InformationPin 5x5 x 0.6 mm QFN Thermal Impedances Solder Reflow Peak TemperatureImportant Notes Thermal Impedances per Package Typical θ JADevelopment Tool Selection SoftwareAll development kits are sold at the Cypress Online Store Evaluation Tools Device ProgrammersAll evaluation tools are sold at the Cypress Online Store Third-Party Tools Build a PSoC Emulator into Your Board Accessories Emulation and ProgrammingBytes Blocks Pins Inputs Ordering InformationCapSense Digital IO Analog Origin of Change Submission Date Description of Change Document HistoryWorldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal Information