Cypress CY62146E MoBL manual Write Cycle No 1 WE Controlled 13, 17

Page 7

CY62146E MoBL

Switching Waveforms (continued)

Figure 6. Write Cycle No 1: WE Controlled [13, 17, 18]

 

 

tWC

ADDRESS

 

 

 

 

tSCE

CE

 

 

 

tAW

tHA

WE

tSA

tPWE

 

 

BHE/BLE

 

tBW

OE

 

tHD

 

 

tSD

DATA IO

NOTE 19

DATAIN

 

tHZOE

 

Figure 7. Write Cycle 2: CE Controlled [13, 17, 18]

 

 

tWC

 

ADDRESS

 

 

 

 

 

tSCE

 

CE

 

 

 

 

tSA

 

tHA

 

tAW

 

WE

 

tPWE

 

 

 

 

BHE/BLE

 

tBW

 

OE

 

 

 

 

 

tSD

t

 

 

 

HD

DATA IO

NOTE 19

DATAIN

 

 

tHZOE

 

 

Notes

17.Data IO is high impedance if OE = VIH.

18.If CE goes HIGH simultaneously with WE = VIH, the output remains in a high impedance state.

19.During this period, the IOs are in output state. Do not apply input signals.

Document Number: 001-07970 Rev. *D

Page 7 of 11

[+] Feedback

Image 7
Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Functional DescriptionProduct Portfolio Pin ConfigurationCapacitance Electrical CharacteristicsMaximum Ratings Operating RangeParameters Unit Data Retention CharacteristicsParameter Description Conditions Min Typ2 Max Unit Write Cycle Switching CharacteristicsRead Cycle No.1 Address Transition Controlled Switching WaveformsWrite Cycle No 1 WE Controlled 13, 17 Write Cycle 3 WE controlled, OE LOW BHE BLE Inputs/Outputs Mode PowerOrdering Information Truth TablePin Tsop II Package DiagramsDocument History Issue Date Orig. Change Description of ChangeREV ECN no