Cypress CY14E102L, CY14E102N manual Α α

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ADVANCE

CY14E102L, CY14E102N

 

 

 

 

 

 

 

 

 

 

Switching Waveforms (continued)

Figure 11. OE Controlled Software STORE/RECALL Cycle[19]

ADDRESS

CE

OE

tRC

ADDRESS # 1

tAS tCW

tGHAX

α α α α

tRC

ADDRESS # 6

α α α α α α

tSTORE / tRECALL

DQ (DATA)

DATA VALID

α α

 

α α

DATA VALID

HIGH IMPEDANCE

 

Figure 12. Hardware STORE Cycle[22]

Figure 13. Soft Sequence Processing[20, 21]

tSS

tSS

Document Number: 001-45755 Rev. *A

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Contents Functional Description FeaturesLogic Block Diagram Cypress Semiconductor Corporation 198 Champion CourtNot to Scale PinoutsX16 Pin Definitions Sram Write Device OperationSram Read AutoStore OperationA15 A0 Mode Power Hardware Recall Power UpMode Selection Software StoreData Protection Mode Selection A15 A0 PowerPreventing AutoStore Noise ConsiderationsOperating Range DC Electrical CharacteristicsMaximum Ratings RangeAC Test Loads CapacitanceThermal Resistance AC Test ConditionsSram Write Cycle AC Switching CharacteristicsMin Max Parameters Sram Read Cycle Hardware Store Cycle AutoStore and Power Up RecallSoftware Controlled Store and Recall Cycle Switching Waveforms Switching Waveforms AutoStore or Power Up RECALL26 Α α Ordering Information CY14E102N-BA25XCT CY14E102L-ZS25XCTCY14E102L-ZS25XIT CY14E102L-BA25XITZS Tsop Part Numbering NomenclatureCY 14 E 102 L ZS P 15 X C T NvsramPackage Diagrams Pin TsopBall Fbga 6 mm x 10 mm x 1.2 mm 51-85160 Orig. Submission Description of Change Sales, Solutions, and Legal InformationDocument History