Cypress CY62138F Pin Configuration, Product Portfolio, Pin SOIC/TSOP II Pinout Top View, Max Typ

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CY62138F MoBL®

Pin Configuration [2]

32-Pin SOIC/TSOP II Pinout

Top View

A17

A16

A14

A12

A7 A6 A5 A4 A3 A2 A1 A0 IO0 IO1 IO2

VSS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

32

 

VCC

 

31

 

 

A15

 

30

 

 

CE2

 

29

 

 

WE

 

28

 

A13

 

27

 

 

A8

 

 

 

 

A

26

 

 

A9

25

 

11

 

 

 

 

 

24

 

 

OE

 

23

 

A10

 

 

22 CE1

IO7 IO6 IO5 IO4

IO32120191817

Product Portfolio

 

 

 

 

 

 

 

 

 

 

Power Dissipation

 

 

 

 

 

 

 

 

 

 

 

 

 

Product

 

VCC Range (V)

 

Speed

 

Operating ICC (mA)

 

 

Standby ISB2 (A)

 

 

 

 

 

(ns)

f = 1MHz

f = fmax

 

 

 

 

 

 

 

 

 

 

 

 

Min

 

Typ [3]

 

Max

 

Typ [3]

 

Max

Typ [3]

 

Max

 

Typ [3]

Max

CY62138FLL

4.5V

 

5.0V

 

5.5V

45

1.6

 

2.5

13

 

18

 

1

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Notes

2.NC pins are not connected on the die.

3.Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25°C.

Document #: 001-13194 Rev. *A

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Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram Functional Description Pin SOIC/TSOP II Pinout Top View Pin ConfigurationProduct Portfolio Max TypOperating Range Electrical Characteristics Over the Operating RangeMaximum Ratings Thermal ResistanceData Retention Waveform Data Retention Characteristics Over the Operating RangeAC Test Loads and Waveforms Parameters UnitWrite Cycle Parameter Description 45 ns Unit MinRead Cycle Write Cycle No WE controlled 10, 14, 18 Switching WaveformsRead Cycle No OE controlled 10, 16 Ordering Information Inputs/Outputs Mode PowerTruth Table Package Diagrams Pin 450 Mil Molded SoicPin Tsop II Issue Date Orig. Change Description of Change Document History