Cypress CY62146ESL manual Switching Waveforms, Read Cycle No.1 Address Transition Controlled

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CY62146ESL MoBL

Switching Waveforms

Figure 2. Read Cycle No.1: Address Transition Controlled. [13, 14]

tRC

ADDRESS

tAA

tOHA

DATA OUT

PREVIOUS DATA VALID

DATA VALID

 

Figure 3. Read Cycle No. 2: OE Controlled [14, 15]

ADDRESS

 

 

CE

 

tRC

 

 

 

 

tPD

 

t

tHZCE

 

ACE

 

OE

 

 

 

tDOE

tHZOE

 

 

BHE/BLE

tLZOE

 

 

 

 

tDBE

tHZBE

 

 

 

tLZBE

HIGH

DATA OUT

HIGHIMPEDANCE

IMPEDANCE

tLZCE

DATA VALID

 

 

 

tPU

ICC

VCC

 

50%

50%

SUPPLY

 

ISB

CURRENT

 

 

Notes

13.The device is continuously selected. OE, CE = VIL, BHE, BLE, or both = VIL.

14.WE is HIGH for read cycle.

15.Address valid before or similar to CE, BHE, BLE transition LOW.

Document #: 001-43142 Rev. **

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Functional DescriptionProduct Portfolio Pin ConfigurationDevice Range Ambient Electrical CharacteristicsMaximum Ratings Operating RangeTsop CapacitanceThermal Resistance AC Test Loads and WaveformsData Retention Waveform Data Retention CharacteristicsParameter Description Conditions Min Typ Max Unit Parameter Read Cycle Description 45 ns Min Max Unit Switching CharacteristicsWrite Cycle12 Read Cycle No.1 Address Transition Controlled Switching WaveformsWrite Cycle No 1 WE Controlled 12, 16 Write Cycle 3 WE controlled, OE LOW CY62146ESL-45ZSXI Inputs/Outputs Mode PowerOrdering Information BHE BLEPackage Diagrams REV ECN no Issue Date Orig. Change Description of Change 1875228New Data Sheet Document History