Cypress CY7C1298H manual Switching Waveforms, Read Timing16

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CY7C1298H

Switching Waveforms

Read Timing[16]

tCYC

CLK

tCH

tADS tADH

ADSP

ADSC

tAS tAH

tCL

tADS tADH

ADDRESS

GW, BWE,BW[A:B]

CE

A1

tCES tCEH

A2

A3

tWES tWEH

Burst continued with

new base address

 

 

Deselect

 

cycle

tADVS

tADVH

ADV

 

 

OE

 

 

 

t

tOEHZ

 

CLZ

 

Data Out (Q)

High-Z

Q(A1)

 

tCO

 

 

Single READ

 

ADV suspends burst

tOEV

tCO

 

 

 

 

 

 

tOELZ

t

 

 

 

 

 

tCHZ

 

DOH

 

 

 

 

 

 

 

Q(A2)

Q(A2 + 1)

Q(A2 + 2)

Q(A2 + 3)

Q(A2)

Q(A2 + 1)

Q(A3)

 

 

 

 

 

Burst wraps around

 

 

 

 

BURST READ

 

to its initial state

 

 

 

 

 

 

 

 

 

DON’T CARE

 

UNDEFINED

 

 

 

 

Note:

16. On this diagram, when CE is LOW, CE1 is LOW, CE2 is HIGH and CE3 is LOW. When CE is HIGH, CE1 is HIGH or CE2 is LOW or CE3 is HIGH.

Document #: 38-05665 Rev. *B

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Contents Cypress Semiconductor Corporation FeaturesSelection Guide Functional Description1 166 MHz 133 MHz UnitCY7C1298H Functional Block DiagramTop View Pin Configurations Pin TqfpCY7C1298H Pin Descriptions Burst Sequences Sleep ModeFunctional Overview A1, A0 Interleaved ‘Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND First Second Third Fourth AddressParameter Description Test Conditions Min Max Unit ZZ Mode Electrical CharacteristicsFunction Ambient Range Electrical Characteristics Over the Operating Range7,8Maximum Ratings Operating RangeAC Test Loads and Waveforms Thermal Characteristics9Capacitance9 Switching Characteristics Over the Operating Range 14 Read Timing16 Switching WaveformsAddress A1 A2 Write Timing16Read/Write Timing16, 18 DON’T Care ZZ Mode Timing20Pin Tqfp 14 x 20 x 1.4 mm Package DiagramOrdering Information Document History Issue Date Orig. Description of Change