The displayed configuration is based on the manufacturer's SETUP DEFAULTS settings.
This section allows you to configure the system based on the specific features of the installed chipset. This chipset manages bus speeds and access to system memory resources, such as SDRAM. It also coordinates communications between the conventional ISA bus and the PCI bus. It must be stated that these items should never need to be altered. The default settings have been chosen because they provide the best operating conditions for your system. The only time you might consider making any changes would be if you discovered that data was being lost while using your system.
Because of the complexity and technical nature of some of the options, not all of the options are described here.
SDRAM RAS-to-CAS Delay
This field lets you control the number of DCLKs between a Row Activate command and a read or write command.
SDRAM RAS Precharge Time
The precharge time is the number of cycles it takes for the RAS to accumulate its charge before DRAM refresh. If insufficient time is allowed, refresh may be incomplete and the DRAM may fail to retain data. This field applies only if synchronous DRAM is installed in the system.
SDRAM CAS Latency Time
When synchronous DRAM is installed, you can control the number of CLKs between when the SDRAMs sample a read command and when the contoller samples read data from the SDRAMs. Do not reset this field from the default value specified by the system designer.