Maxtor 51024U2, 52049U4, 51536U3, 53073U6, 54098U8 specifications Reset and Interrupt Handling

Page 40

HOST SOFTWARE INTERFACE

Reset and Interrupt Handling

Reset Handling

One of three different conditions may cause a reset: power on, hardware reset or software reset. All three cause the interface processor to initialize itself and the Task File registers of the interface. A reset also causes a set of the Busy bit in the Status register. The Busy bit does not clear until the reset clears and the drive completes initialization. Completion of a reset operation does not generate a host interrupt.

Task File registers are initialized as follows:

Error		1
Sector	Count	1
Sector	Number	1
Cylinder Low		0
Cylinder High		0
Drive/Head		0

Interrupt Handling

The drive requests data transfers to and from the host by asserting its IRQ 14 signal. This signal interrupts the host if enabled by bit 1 (IRQ enable) of the Fixed Disk Control register.

Clear this interrupt by reading the Status register, writing the Command register, or by executing a host hardware or software reset.

6 – 6

Image 40

Contents DiamondMax Plus Before You Begin U T I O NContents Handling and Installation Product SpecificationsDiamondmax Plus 40 Product Manual AT Interface Description Interface CommandsHost Software Interface Service and Support GlossaryFigures Introduction MaxtorCorporationManualOrganization AbbreviationsConventions Diamondmax Plus 40 IntroductionDiamondMax Plus 40 Key Features Product DescriptionProduct Features Functional / InterfaceModel CYL SPT MAX LBA CapacityCacheManagement MajorHDAComponents SubsystemConfiguration Jumper Location / ConfigurationJumper Configuration CylinderLimitationJumperDescriptionProductSpecifications DriveConfigurationPerformanceSpecifications ModelsandCapacitiesPhysicalDimensionsmaximum Product SpecificationsPowerRequirements PowerModeDefinitionsEPA Energy Star Compliance EnvironmentalLimitsShock and Vibration ReliabilitySpecificationsParameter Operating NON-OPERATING SafetyRegulatoryCompliance EMC/EMIHardDriveHandlingPrecautions HandlingandInstallationElectro-StaticDischargeESD Installation UnpackingandInspectionPhysicalInstallation RepackingBefore You Begin Hook upSet up Start upInterfaceConnector PIN SignalATInterfaceDescription PinDescriptionSummaryPin Description Table PIN Name Signal Name Signal DescriptionAT Interface Description Timing Parameters Mode PIO TimingTiming Parameters Mode 0 Mode 1 Mode DMATimingMode MIN MAX Ultra DMA TimingSustained Ultra DMA Data In Burst Device Terminating an Ultra DMA Data In Burst Initiating an Ultra DMA Data Out Burst Device Pausing an Ultra DMA Data Out Burst Device Terminating an Ultra DMA Data Out Burst HostSoftwareInterface Task File RegistersPort Read Write Abrt TK0 AmnfContents LBA Bits Busy Drdy DSC DRQ ERRHost Software Interface LBA DRV HS3 HS2 HS1 HS0 CommandRegister Command Name Command Code Parameters Used Timer Value TIME-OUT PeriodSummary SDHIEN Control Diagnostic RegistersDS0 Reset and Interrupt Handling InterfaceCommands ReadCommands Interface CommandsRead DMA WriteCommands Write Multiple SetFeatureCommands Value DescriptionPowerModeCommands Timer Value TIME-OUT Period InitializationCommands Word Content Description15-8 = PIO data transfer mode Interface Commands Word Content Description Initialize Drive Parameters Seek,FormatandDiagnosticCommands Error Code DescriptionA.R.T. CommandSet Key RegisterServiceandSupport ServicePolicyNoQuibble Service SupportService and Support From DialGlossary Correctableerror DirectaccessDirectmemoryaccess ErrorcorrectioncodeeccHarderror HeaddiskassemblyhdaExtrapulse FeedbackPhaselockedlooppll LandingzoneorlzoneLatebit LatewindowPhasemargin RandomaccessmemoryramReadgatesignal RecoverableerrorSofterror StrobeoffsetsignalUN-CORRECTABLEERROR Unrecoverableerror