Diamond Systems RUBY-MM-1612 user manual Features, Ordering Information, Description, Pinouts

Page 20

June 1998

82C55A

CMOS Programmable Peripheral Interface

Features

Pin Compatible with NMOS 8255A

24 Programmable I/O Pins

Fully TTL Compatible

High Speed, No “Wait State” Operation with 5MHz and 8MHz 80C86 and 80C88

Direct Bit Set/Reset Capability

Enhanced Control Word Read Capability

L7 Process

2.5mA Drive Capability on All I/O Ports

Low Standby Power (ICCSB) . . . . . . . . . . . . . . . . .10μA

Ordering Information

PART NUMBERS

 

TEMPERATURE

PKG.

5MHz

8MHz

PACKAGE

RANGE

NO.

CP82C55A-5

CP82C55A

40 Ld PDIP

0oC to 70oC

E40.6

IP82C55A-5

IP82C55A

-40oC to 85oC

E40.6

 

CS82C55A-5

CS82C55A

44 Ld PLCC

0oC to 70oC

N44.65

IS82C55A-5

IS82C55A

-40oC to 85oC

N44.65

 

CD82C55A-5

CD82C55A

40 Ld

0oC to 70oC

F40.6

ID82C55A-5

ID82C55A

-40oC to 85oC

F40.6

CERDIP

 

 

-55oC to 125oC

F40.6

MD82C55A-5/B

MD82C55A/B

 

8406601QA

8406602QA

SMD#

 

F40.6

 

 

 

 

 

MR82C55A-5/B

MR82C55A/B

44 Pad

-55oC to 125oC

J44.A

CLCC

 

 

SMD#

 

 

8406601XA

8406602XA

 

J44.A

 

 

 

 

 

Description

The Intersil 82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation. The high performance and industry standard configuration of the 82C55A make it compatible with the 80C86, 80C88 and other microprocessors.

Static CMOS circuit design insures low operating power. TTL compatibility over the full military temperature range and bus hold circuitry eliminate the need for pull-up resistors. The Intersil advanced SAJI process results in performance equal to or greater than existing functionally equivalent products at a fraction of the power.

Pinouts

 

 

 

82C55A (DIP)

 

 

 

TOP VIEW

 

 

PA3

1

40

PA4

PA2

2

39

PA5

PA1

3

38

PA6

PA0

4

37 PA7

RD

5

36

WR

CS

6

35

RESET

GND

7

34

D0

A1

8

33

D1

A0

9

32

D2

PC7 10

31 D3

PC6 11

30

D4

PC5 12

29

D5

PC4 13

28

D6

PC0 14

27

D7

PC1 15

26

VCC

PC2 16

25

PB7

PC3 17

24

PB6

PB0 18

23

PB5

PB1 19

22

PB4

PB2 20

21 PB3

82C55A (CLCC)

TOP VIEW

 

CS

RD

PA0

PA1

PA2

PA3

PA4

PA5 PA6 PA7

WR

 

 

6

5

4

3

2

1

44 43 42 41 40

 

GND 7

 

 

 

 

 

 

 

39 NC

CS

NC

8

 

 

 

 

 

 

 

38 RESET

A1

9

 

 

 

 

 

 

 

37 D0

GND

 

 

 

 

 

 

 

A1

A0

10

 

 

 

 

 

 

 

36 D1

 

 

 

 

 

 

 

A0

PC7 11

 

 

 

 

 

 

 

35 D2

 

 

 

 

 

 

 

PC7

PC6 12

 

 

 

 

 

 

 

34 D3

 

 

 

 

 

 

 

NC

PC5 13

 

 

 

 

 

 

 

33 D4

 

 

 

 

 

 

 

PC6

PC4 14

 

 

 

 

 

 

 

32 D5

 

 

 

 

 

 

 

PC5

PC0 15

 

 

 

 

 

 

 

31 D6

PC4

PC1 16

 

 

 

 

 

 

 

30 D7

PC0

PC2 17

 

 

 

 

 

 

 

29 NC

PC1

18 19 20 21 22

23 24 25 26 27 28

PC3

PB0

PB1

PB2 PB3

PB4

PB5

PB6

PB7

CC

NC

V

82C55A (PLCC)

TOP VIEW

 

RD

PA0

PA1

PA2

PA3

NC

PA4

PA5 PA6 PA7

WR

 

 

 

 

 

6

5

4

3

2

1

44

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

43

 

42

41 40

 

 

7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

39

 

RESET

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

38

 

D0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

37

 

D1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

36

 

D2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

35

 

D3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

34

 

NC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

33

 

D4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32

 

D5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

31

 

D6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

30

 

D7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

17

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

29

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18 1920 21 22 23 24 25 26 27 28

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PC2

PC3

PB0

PB1

PB2

NC

PB3

PB4 PB5 PB6

PB7

 

 

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 2969.2

 

http://www.intersil.com or 407-727-9207 Copyright © Intersil Corporation 1999 1

 

Image 20 Contents
RUBY-MM-1612 Table of Contents Description Signal Name Definition O Header PinoutBase Address Board ConfigurationBase Address Configuration Header J5 Position Hex Decimal Analog Output Range Configuration Adjustable Reference VoltageOn-Board Reference Full-Scale Voltage Selection Full-Scale VoltageAnalog Output Configuration Header J4 Range RUBY-MM-1612 Board Drawing Base + Write Function Read Function Reset informationRuby-MM-1612 I/O Map Base + 0 or 1, Read Update DACs Register DefinitionsBase + 0, Write DAC LSB register Base + 1, Write DAC MSB registerBase + 3, Write External trigger register Configuration Register 82C55 Digital I/O Chip Operation82C55 Register Map DefinitionsFull Scale Analog Output Ranges and ResolutionFull Scale 1LSB 10. D/A Code Computation Output Code Explanation Output Voltage for ±5V Range Offset Binary Coding for bipolar output rangesLSB = 1/2048 x Full-Scale Voltage To generate an analog output on one or more channels HOW to Generate AN Analog OutputHardware Update Command Examples Single channel output Two channel outputCalibration Procedure Specifications MiscellaneousFeatures Ordering InformationDescription PinoutsFunctional Diagram 82C55A Pin Description82C55A Functional Description Data Bus BufferRead/Write and Control Logic Group a and Group B ControlsMode Selection 82C55AOperational Description Ports A, B, and CSingle Bit Set/Reset Feature Figure Operating ModesInterrupt Control Functions Inte Flip-Flop DefinitionMode 0 Configurations Mode 0 Basic InputMode 0 Basic Output Control Word #4 Control Word #8 IBF Input Buffer Full F/F Input Control Signal DefinitionSTB Strobe Input Output Control Signal Definition Intr Interrupt RequestMode 2 Strobed Bi-Directional Bus I/O Bi-Directional Bus I/O Control Signal DefinitionOutput Operations Input OperationsMode Control Word Mode 2 Combinations Special Mode Combination Considerations Current Drive CapabilityApplications of the 82C55A Reading Port C Status Figures 15