Diamond Systems 16-Channel 12-Bit Analog Output PC/104 Module user manual 82C55A Pin Description

82C55A

Pin Description

			PIN
SYMBOL			NUMBER	TYPE	DESCRIPTION
VCC			26		VCC: The +5V power supply pin. A 0.1μF capacitor between pins 26 and 7 is
					recommended for decoupling.
GND			7		GROUND
D0-D7			27-34	I/O	DATA BUS: The Data Bus lines are bidirectional three-state pins connected to the
					system data bus.
RESET			35	I	RESET: A high on this input clears the control register and all ports (A, B, C) are set
					to the input mode with the “Bus Hold” circuitry turned on.
			6	I	CHIP SELECT: Chip select is an active low input used to enable the 82C55A onto the
		CS
					Data Bus for CPU communications.
			5	I	READ: Read is an active low input control signal used by the CPU to read status
	RD
					information or data via the data bus.
			36	I	WRITE: Write is an active low input control signal used by the CPU to load control
	WR
					words and data into the 82C55A.
A0-A1			8, 9	I	ADDRESS: These input signals, in conjunction with the		and		inputs, control
						RD		WR
					the selection of one of the three ports or the control word register. A0 and A1 are
					normally connected to the least significant bits of the Address Bus A0, A1.
PA0-PA7			1-4, 37-40	I/O	PORT A: 8-bit input and output port. Both bus hold high and bus hold low circuitry are
					present on this port.
PB0-PB7			18-25	I/O	PORT B: 8-bit input and output port. Bus hold high circuitry is present on this port.
PC0-PC7			10-17	I/O	PORT C: 8-bit input and output port. Bus hold circuitry is present on this port.

Functional Diagram

POWER	+5V		GROUP A	I/O
			PORT A	PA7-PA0
SUPPLIES	GND	GROUP A
			(8)
		CONTROL

			GROUP A	I/O
			PORT C
BI-DIRECTIONAL				PC7-PC4
			UPPER
DATA BUS			(4)
	DATA BUS
D7-D0
	BUFFER
			GROUP B
		8-BIT		I/O
		INTERNAL	PORT C
				PC3-PC0
		DATA BUS	LOWER
			(4)
RD	READ
WR		GROUP B
	WRITE
A1	CONTROL	CONTROL	GROUP B	I/O
	LOGIC		PORT B	PB7-PB0
A0
			(8)
RESET
CS

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