Diamond Systems RUBY-MM-1612 82C55 Digital I/O Chip Operation, 82C55 Register Map, Definitions

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8. 82C55 DIGITAL I/O CHIP OPERATION

This is a short form description of the 82C55 digital I/O chip on the board. A full datasheet is included at the back of this manual.

82C55 Register Map

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Base + n, Dir, Function

D7

D6

D5

D4

D3

D2

D1

D0

 

 

 

 

 

 

 

 

 

4, R/W, Port A

A7

A6

A5

A4

A3

A2

A1

A0

 

 

 

 

 

 

 

 

 

5, R/W, Port B

B7

B6

B5

B4

B3

B2

B1

B0

 

 

 

 

 

 

 

 

 

6, R/W, Port C

C7

C6

C5

C4

C3

C2

C1

C0

 

 

 

 

 

 

 

 

 

7, W, Config Register

1

ModeC

ModeA

DirA

DirCH

ModeB

DirB

DirCL

 

 

 

 

 

 

 

 

 

Configuration Register

The configuration register is programmed by writing to Base + 7 using the format below. Once you have set the port directions with this register, you can read and write to the ports as desired.

Bit No.

7

6

 

5

4

3

 

2

1

0

 

 

 

 

 

 

 

 

 

Name

1

ModeC

ModeA

DirA

DirCH

ModeB

DirB

DirCL

Definitions:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

Bit 7 must be set to 1 to indicate port mode set operation.

 

 

DirA

Direction control for bits A7 – A0: 0 = output, 1

= input

 

 

DirB

Direction control for bits B7 – B0: 0 = output, 1

= input

 

 

DirCL

Direction control for bits C3 – C0: 0 = output, 1 = input

 

 

DirCH

Direction control for bits C7 – C4: 0 = output, 1 = input

 

 

ModeA, ModeB, ModeC

I/O Mode for each port, 0 or 1

 

 

 

 

Here is a list of common configuration register values (others are possible):

Configuration Byte

 

 

 

 

Hex

Decimal

Port A

Port B

Port C (both halves)

9B

155

Input

Input

Input

(all ports input)

92

146

Input

Input

Output

 

99

153

Input

Output

Input

 

90

144

Input

Output

Output

 

8B

139

Output

Input

Input

 

82

130

Output

Input

Output

 

89

137

Output

Output

Input

 

80

128

Output

Output

Output

(all ports output)

Copyright 2001 Diamond Systems Corp.

Ruby-MM-1612 User Manual V1.1 P. 12

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Contents RUBY-MM-1612 Table of Contents Description Signal Name Definition O Header PinoutBoard Configuration Base Address Configuration Header J5 Position Hex DecimalBase Address Analog Output Range Configuration Adjustable Reference VoltageOn-Board Reference Full-Scale Voltage Selection Full-Scale VoltageAnalog Output Configuration Header J4 Range RUBY-MM-1612 Board Drawing Reset information Ruby-MM-1612 I/O MapBase + Write Function Read Function Base + 0 or 1, Read Update DACs Register DefinitionsBase + 0, Write DAC LSB register Base + 1, Write DAC MSB registerBase + 3, Write External trigger register Configuration Register 82C55 Digital I/O Chip Operation82C55 Register Map DefinitionsAnalog Output Ranges and Resolution Full Scale 1LSBFull Scale 10. D/A Code Computation Offset Binary Coding for bipolar output ranges LSB = 1/2048 x Full-Scale VoltageOutput Code Explanation Output Voltage for ±5V Range HOW to Generate AN Analog Output Hardware Update CommandTo generate an analog output on one or more channels Examples Single channel output Two channel outputCalibration Procedure Specifications MiscellaneousFeatures Ordering InformationDescription PinoutsFunctional Diagram 82C55A Pin Description82C55A Functional Description Data Bus BufferRead/Write and Control Logic Group a and Group B ControlsMode Selection 82C55AOperational Description Ports A, B, and CSingle Bit Set/Reset Feature Figure Operating ModesInterrupt Control Functions Inte Flip-Flop DefinitionMode 0 Basic Input Mode 0 Basic OutputMode 0 Configurations Control Word #4 Control Word #8 Input Control Signal Definition STB Strobe InputIBF Input Buffer Full F/F Output Control Signal Definition Intr Interrupt RequestMode 2 Strobed Bi-Directional Bus I/O Bi-Directional Bus I/O Control Signal DefinitionOutput Operations Input OperationsMode Control Word Mode 2 Combinations Special Mode Combination Considerations Current Drive CapabilityApplications of the 82C55A Reading Port C Status Figures 15

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