SOYO SY-K7VTA manual OnChip USB, Usb, Keyboard Support, CPU to PCI Write Buffer

BIOS Setup Utility SY-K7VTA

CHIPSET FEATURES SETUP (Continued)

CHIPSET FEATURES

K7 CLK_CTL Select

Setting	Description	Note
Optimal	The Clock Control register	Default

(Clk_Ctl) specifies how the processor will ramp up the processor clock during low power modes

Default

OnChip USB

Disabled

Enabled

This should be enabled if your system has a USB installed on the Default system board and you want to use it.

Even when so equipped, if you add a higher performance controller, you will need to disable this feature.

USB

Keyboard

Support

Disabled		Default
Enabled	Select Enabled if your system
	contains a Universal Serial Bus

(USB) controller and you have a USB keyboard.

CPU to PCI Write Buffer

Disabled

Enabled

When this field is Enabled, writes

from the CPU to the PCI bus are Default buffered, to compensate for the

speed differences between the CPU and the PCI bus. When Disabled, the writes are not buffered and the CPU must wait until the write is complete before starting another write cycle.

PCI Dynmic Bursting

PCI Master 0 WS Write

Disabled	When Enabled, every write
Enabled	transaction goes to the write buffer.	Default
	Burstable transactions then burst on
	the PCI bus and nonburstable
	transactions don’t.
Disabled	When Enabled, writes to the PCI
Enabled	bus are executed with zero wait	Default
	states.

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