Toshiba TOPAS900 user manual Figures

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Users Manual TOPAS900 Flash V2.1

5.1.1.MCU Internal Memory Map ______________________________________________ 30

5.1.2.Internal Mapping in different Modes ________________________________________ 31

5.1.3.Programming in Single Boot Mode _________________________________________ 31

5.1.4.Normal Operation Mode _________________________________________________ 32

5.2.Jumper Description _________________________________________________ 34

5.2.1.The jumpers of the Programming-Debugging Board_____________________________ 34

5.2.2.The jumpers of the Flash Carrier Board ______________________________________ 34

5.3.Programming of Flash Memory _______________________________________ 34

6.Technical Sheets_________________________________________________ 36

6.1.Board Schematics ___________________________________________________ 36

6.2.Component Print ___________________________________________________ 41

6.3.PCB Routing_______________________________________________________ 42

7.Application Board _______________________________________________ 43

8.Electromagnetic Compatibility______________________________________ 45

Figures

 

Figure 1 : The TOPAS900 Flash Board (Top View)

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Figure 2 : Breaking off TOPAS900 Flash Board from Flash Carrier Board

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Figure 3 : Principe of Connection

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Figure 4 : TMP95FY64 Schematic Block Diagram

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Figure 5 : IAR Embedded Workbench Desktop with Project Window

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Figure 6 : C-Spy Desktop with Source Code, Memory and Register Window

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Figure 7 : TMPro Window

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Figure 8 : Memory Usage of IAR ROM-Monitor

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Figure 9 : Memory Usage of Toshiba ROM-Monitor

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Figure 10 : The MCU's Internal Memory Map

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Figure 11 : Internal Mapping in Single Boot and Single Chop Mode

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Figure 12 : Map for Internal Flash Programming

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Figure 13 : Memory Map for using external / internal Flash

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Figure 14 : Flash Programmer Window

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Figure 15 : Schematic Page 1 of 4

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Figure 16 : Schematic Page 2 of 4

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Figure 17 : Schematic Page 3 of 4

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Figure 18 : Schematic Page 4 of 4

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Figure 19 : Component Print – Top & Bottom View

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Figure 20 : PCB Routing – Top & Bottom View

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Figure 21 : The Application Board

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HWU Elektronik Oberhausen

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Image 4 Contents
TOPAS900 Flash Preface Contents Figures Definitions and Abbreviations CPUKey Features of TOPAS900 Flash Package What is TOPAS900 Flash?Introduction Let’s start with TOPAS900 Flash What is in the box?Unpacking Glance at the TOPAS900 Flash Board SUBPrincipe of Connection Breaking off TOPAS900 Flash Board from Flash Carrier BoardPower Supply Hardware DescriptionProgramming and Debugging Board Firmware ProcessorControl Switches Reset and NMI Serial Communication, Connector and Line DriverConnector to Flash Carrier Board Status LEDsTMP95FY64F Microcontroller TMP95FY64 Schematic Block Diagram Kb Flash ROM Toshiba TC58F400 90 nsConnector to Programming and Debugging Board MCU Terminal ConnectorsKb RAM Toshiba TC551001 70 ns JumpersPage IAR Tools Software DescriptionEmbedded Workbench Editing Sources Spy Debugger/SimulatorSpy ROM-Monitor IAR Tools LimitationsToshiba Tools Compiler, Assembler, Linker, ConverterCompile and Link \SAMPLE\TEST900 TMPro Debugger TMPro WindowHow to create a new debugging profile *.tdp Page TMPro ROM-Monitor Toshiba Tool Limitations ROM-Monitor Memory Usage F80000H FE0000H Toshiba ROM-MonitorF8C961H Restrictions of ROM-Monitor Usage Resource Type IAR C-Spy ROM-Monitor Toshiba TMPro ROMOperating Modes Functional DescriptionMCU Internal Memory Map Programming in Single Boot Mode Internal Mapping in different ModesNormal Operation Mode Memory MAPMemory Map for using external / internal Flash Jumper Description Jumpers of the Programming-Debugging BoardJumpers of the Flash Carrier Board Programming of Flash MemoryFlash Programmer Window Board Schematics Technical SheetsSchematic Page 1 Schematic Page 2 Schematic Page 3 Schematic Page 4 Component Print Component Print Top & Bottom ViewPCB Routing PCB Routing Top & Bottom ViewApplication Board Application Board∙ TOPAS900 can Electromagnetic Compatibility
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