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Users Manual TOPAS900 Flash V2.1
Please refer to the memory maps to get information about the address range of the chip in memory.
3.2.3. 128 kb RAM - Toshiba TC551001 (70 ns)
This memory component is soldered on the bottom side of the PCB. It has a size of 128 kb and is organized in
Please refer to the memory maps to get information about the address range of the chip in memory. The external RAM is used additionally to the internal RAM of 8 kb of the MCU. When the Toshiba ROM monitor is running almost 32 kb are allocated to the ROM monitor. For all monitor operations the RAM is mapped to address 0xFE0000..0xFFFFFF and covers the interrupt vector area that must be writable for debugging purposes.
3.2.4. Connector to Programming and Debugging Board
To connect the Programming and Debugging Board a
3.2.5. MCU Terminal Connectors
The Flash Carrier Board can be used - when properly programmed -
3.2.6. Jumpers
J_CS0 : This jumper is to connect/disconnect the chip select line CS0 to the
J_CS2 : Same as above. The CS2 pin is used to enable the
J_EA : Jumper to select between internal (high/open) and external flash memory access (low/closed) after reset. When the Flash Carrier Board is connected to the Programming
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