ADTRAN DDS-DP Options, Error Correction, Software Provisioning via Series 5 BCU, SW2-4 Absig

Series 5 Total Reach DDS-DP may interoperate over the carrier system with another Total Reach DDS-DP, OCU DP, DS0 DP, 1/0 DCS, or switch and may be located in an end office, hub office, intermediate office, or Digital Loop Carrier (Figure 2). The

2-wire loop is connected using the odd pair Tip (pin 31) and Ring (pin 32) on the Series 5 backplane.

	SLC
	SERIES 5		Customer Premises
	DLC
				4-Wire Customer
	TR	2-Wire Loop		Interface
T-Carrier
	DDS-DP	TR		DSU/CSU
		DDS-R
		T/R Pair

Figure 2. Total Reach DDS Circuit Diagram

NOTE

The Series 5 Total Reach DDS-DP must be used with an appropriate Total Reach DDS- R unit.

Options

The Series 5 Total Reach DDS-DP is provisioned through the SLC Series 5 system and an on-board DIP switch. SW2 provides feature options not available through the SLC Series 5 channel bank intelligent system. Use the SLC Series 5 Craft Interface Unit (CIU) to provision intelligent channel bank features supported by the Series 5 Total Reach DDS-DP. See Figure 3 and Table 1 for option description and provisioning.

	ON	64K
	1
SW2	2	19.2K
		SW56
	3	ABSIG
	4
	5	QM

Figure 3. Option Switch

NOTE

Select OCU DP, CLEI 5SCU48, when provisioning via the CIU.

Error Correction

When error correction is enabled the Series 5 Total Reach DDS-DP provides an error detection and correction

Table 1. Option Settings

Software Provisioning via Series 5 BCU

Function	Description
Rate	Select 2.4, 4.8, 9.6, or 56 kbps
Error Correction	If rate is 2.4 through 19.2, select:
(EC)	MVEC or NONE (SCEC not available
	at these rates on this card.)
	If rate is 56 through 64 kbps, select:
	SCEC or NONE (MVEC is N/A at
	these rates.)
Zero Code (ZC)	Yes or No
Secondary	Yes or No
Channel (SC)
Hardware Provisioning via Dip Switch SW2
64K	SW2-1 (64K)
	ON selects 64 kbps Clear Channel
19.2K1	SW2-2 (19.2K)
	ON selects 19.2 loop rate
Switched 56	SW2-3 (SW56)
	ON enables Switched 56
	OFF disables Switched 56
A/B Signaling	SW2-4 (ABSIG)
	ON the unit determines the state of the
	A and B signaling bits using signals
	present on the channel bank backplane.
	OFF the unit derives signaling from
	the incomming data stream.
Quality Monitor	SW2-5 (QM)
	ON enables QM
	OFF disables QM

1For 19.2 kbps Error Correction select 19.2 on SW2 and enable 9.6 MVEC with SLC Series 5 CIU.

capability that maintains data integrity across the carrier facility. For subrate and 19.2 kbps rates, error correction and data transmission is accomplished over a single DS0 time slot using a Majority Vote Error Correction (MVEC) algorithm. For error correction at these rates, MVEC must be selected in the BCU via the SLC Series 5 CIU.

For rates of 56 and 64 kbps, error correction requires one additional DS0 time slot for the error correcting parity byte. The Series 5 Total Reach DDS-DP only allows SCEC, the parity byte error correction scheme, at 56 and 64 kbps. When error correction is desired for 19.2 kbps service, provision 9.6 kbps and MVEC via the CIU and select 19.2 on SW2.

2 Section 61433105L2, Issue 4 61433105L2-5D