ADC ADDC1 instruction manual Group Delay Latency, LED Status Indicators

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Jitter Tolerance (With no Measurable Change in Performance)

>12.75 UI sine, 100 Hz to 10 kHz

>3.5 UI sine at 20 kHz

>1.2 UI sine at 40 kHz

>0.4 UI sine at 80 kHz

>0.29 UI sine at 90 kHz

>0.25 UI sine above 160 kHz

Maximum Amplitude of Jitter Induced Sidebands	< -134 dB (measurement limit) (10
	kHz 0 dBFS test tone, 12.75 UI
	sinusoidal jitter at 1 kHz)
Maximum Amplitude of Spurious Tones with 0 dBFS test	-130 dBFS
signal
Maximum Amplitude of Idle Tones	-145 dBFS
Maximum Amplitude of AC line related Hum & Noise	-130 dBFS
Interchannel Differential Phase (Stereo Pair)	+/- 0.5 degrees at 20 kHz
Interchannel Differential Phase (Between ADC1 Units)	+/- 0.5 degrees at 20 kHz
Maximum Lock Time after Fs change	< 1 s for frequency lock
	< 5 s for phase lock
Mute on Sample Rate Change	Yes
Mute on Loss of External Clock	No
Mute on Lock Error	No
Mute on Receive Error	No
Soft Mute Ramp Up/Down Time	10 ms

Group Delay (Latency)

Delay (Analog Input to Digital Output)	1.20 ms at 44.1 kHz
	1.09 ms at 48 kHz
	0.75 ms at 88.2 kHz
	0.67 ms at 96 kHz
	0.63 ms at 176.4 kHz
	0.59 ms at 192 kHz

LED Status Indicators

LED Location	Front Panel
Mode Indicators	9 green
Meter	14 green, 2 yellow, 2 red

ADC1 Instruction Manual

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Contents Channel 24-bit 192-kHz Audio Analog-to-Digital Converter Benchmark ADC1Federal Communications Commission FCC Notice Only Safety InformationContents Overview Page Features Balanced Analog Line Inputs ConnectionsClock Reference Input To adapt to unbalanced sourcesOptical Output Digital OutputsAES/EBU XLR Output Adat S/MUX2 Optical Output Mode Adat Optical Output ModeAdat S/MUX4 Optical Output Mode SPDIF/AES BNC Main and Aux OutputsFuse Holder AC Power Entry ConnectorWord Clock Reference Output To program the conversion mode Mode Switch and DisplayOperation Programming the OutputsReading Sample Rates off of the Mode Display Selecting a Fixed Frequency Using the Internal Clock SourceTo synchronize with an external clock source To select a fixed sample frequency on the Main OutputsProgramming the Aux Output Resetting the ADC1 to Factory Default SettingsAdat or AES/EBU on the Optical Output Meter DisplaySecond Stage Gain Controls Adjusting Input GainFirst Stage Gain Rack Mounting Proper S/MUX Identification is a Must Using Adat S/MUXSample Rate is the Key that Controls S/MUX MUX should not be used for Sample Rate ConversionUltraLock … What is It? Put UltraLock converters to the test Problem #1What UltraLock converters cannot do Frequency Response PerformanceInter-Channel Phase Response THD+N vs. Level, 1 KHz KHz LPF unweighted32K B-H FFT, Idle Channel Noise 32K B-H FFT, -3 dBFS, 1 KHz 32K B-H FFT, -3 dBFS, 10 KHz Worldclock Reference Output SpecificationsAnalog Audio Inputs Digital Audio Outputs Audio Performance LED Status Indicators Group Delay LatencyWeight AC Power RequirementsDimensions Page Benchmark 1 Year Warranty Warranty InformationBenchmark Extended Warranty Benchmark Extended 5* Year WarrantyBenchmark Media Systems, Inc