Analog Devices HSC-ADC-EVALC warranty Tyco HM

Page 20

HSC-ADC-EVALC

016-06676

HS-SERIAL/SPI/AUX

J1

– Zd CONNECTORS	J2 DATA BUS 1
TYCO HM

DATA BUS 2

J3

,

Figure 16.

Rev. 0 Page 20 of 32

Image 20

Contents Features Functional Block DiagramEquipment Needed Product HighlightsHSC-ADC-EVALC Table of Contents Evaluation Board Description HSC-ADC-EVALCProduct Description HSC-ADC-EVALC ADC Capture Board Easy Start Power SuppliesConnection and Setup Jumper Number Description U4 DIP Switch SettingJumpers HSC-ADC-EVALC ADC Capture Board Features HSC-ADC-EVALC Components Top ViewHSC-ADC-EVALC Supported ADC Evaluation Boards HSC-ADC-EVALC Components Bottom ViewHSC-ADC-EVALC Theory of Operation HSC-ADC-EVALC Evaluation Board Schematics and Artwork HSC-ADC-EVALC SchematicsSram Address and Control Fpga to Sram Data AD19 to be Used with Higher Density Sram Devices Sram and Fpga Power Sram a Bypass CAP Unused Rocket I/0 Connections Rocket I/0 Connections USB Connections Rev Page 18 EZ-KIT Expansion Interface for DSPs Tyco HM Configuration Eeprom Power and Voltage Regulators PCB Layout Top SilkscreenHSC-ADC-EVALC J1 HS-SERIAL/SPI/AUX Connector J2 Schematic Net Name Fpga PinConnector J3 HSC-ADC-EVALC J3 I/O Connections to Fpga U1HSC-ADC-EVALC Ordering Information QtyManufacturer Part NumberQty Reference Designator Description R16Ordering Guide ESD Caution Model DescriptionRev Page 31 Rev Page 32