
PIN | SIGNAL | PIN | SIGNAL |
1 | TMDS Data 2- | 16 | Hot Plug Detect |
2 | TMDS Data 2+ | 17 | TMDS Data 0- |
3 | TMDS 2&4 Shield | 18 | TMDS Data 0+ |
4 | TMDS Data 4- (NA) | 19 | TMDS 0&5 Shield |
5 | TMDS Data 4+ (NA) | 20 | TMDS Data 5- (NA) |
6 | DDC Clock | 21 | TMDS Data 5+ (NA) |
7 | DDC Data | 22 | TMDS Clock Shield |
8 | Analog Vertical Sync (NA) | 23 | TMDS Clock+ |
9 | TMDS Data 1- | 24 | TMDS Clock- |
10 | TMDS Data 1+ | C1 | Analog Red (NA) |
11 | TMDS 1&3 Shield | C2 | Analog Green (NA) |
12 | TMDS Data 3- (NA) | C3 | Analog Blue (NA) |
13 | TMDS Data 3+ (NA) | C4 | Analog Horizontal Sync (NA) |
14 | +5.0 VDC | C5 | Analog Ground (NA) |
15 | Ground | (NA) Not used by MonitorLink |
Table 6
MonitorLink DVI Connector
Some manufacturers use
NOTE: V23 models are compliant with HDCP and EIA861 standards for standard, extended and high definition (480i, 480p, 1080i) video. The DVI input is not intended for use with personal computers or devices outputing video signals with computer resolution.
DVI Input Block Diagram
Figure 13 is a block diagram of the DVI input cir- cuitry used on the V23 Chassis. The circuitry will be similar in other models.
Single-link TMDS Data and Clock signals are ap- plied directly to IC2D00. Vcc for the EEPROM, IC7AAA, is supplied by the host device via the DVI connector, pin 14. At the same time, this potential is fed back to pin 16 for Hot Plug Detection. The host device communicates over the DDC bus directly with the EEPROM to retrieve the EDID. IC2D02 is used to convert the 5V I2C to 3.3V logic for compatibility with IC2D00 where HDCP data is exchanged.
IC2D00 decodes and outputs analog RGB/H/V sig- nals for selection by the TV input select circuitry.
Firewire is a trademark of Apple Computer, Inc.
DVI is a trademark of the Digital Display Working Group.
VESA, DDC and EDID are trademarks of the Video Electronics Standard Association.
TMDS is a trademark of Silicone Image, Inc.
HDCP is a trademark of Digital Content Protection, LLC.
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