HP dc5850 manual Memory Subsystem

Processor/Memory Subsystem

3.3Memory Subsystem

All models support up to 8 gigabytes of non-ECC PC2-6400 and PC2-5300 DDR2 memory.

✎The DDR2 SDRAM “PCxxxx” reference designates bus bandwidth (i.e., a PC2-6400 module can, operating at a 800-MHz effective speed, provide a throughput of 6400 MBps (8 bytes × 800 MHz)). Memory speed types may be mixed within a system, but the memory controller will operate at speed of the slowest memory module detected.

The actual clock rate used by the memory will be determined by the processor installed. Memory in Sempron and Athlon-based systems use a derivative of the CPU clock rate. Memory in Phenom-based systems run at the specified frequency.

The system board provides four DIMM sockets

■XMM1, channel A (white)

■XMM2, channel B(white)

■XMM3, channel A(black)

■XMM4, channel B (black)

Memory modules do not need to be installed in pairs although installation of pairs (especially matched sets) provides the best performance. The BIOS will detect the module population and set the system accordingly as follows:

■Single-channel mode: memory installed for one channel only

■Dual-channel asymetric mode: memory installed for both channels but of unequal channel capacities.

■Dual-channel interleaved mode (recommended): memory installed for both channels and offering equal channel capacities, proving the highest performance.

These systems support memory modules with the following parameters:

■Unbuffered, non-ECC 1.8-volt DDR2 DIMMs

■256-Mb, 512-Mb, and 1-Gb memory technologies for x8 and x16 devices

■CAS latency (CL) of 5 for 667- or 800-MHz DDR2, or CL of6 for 800-MHz DDR2

■Single or double-sided DIMMs

An installed mix of memory module types is acceptable but operation will be constrained to the level of the module with the lowest (slowest) performance.

Technical Reference Guide www.hp.com 3-3