PIN ASSIGNMENTS
1 | LADJ/GND ANT | 24 | |
2 | D0 | GND | 23 |
3 | D1 | A9 | 22 |
4 | GND | A8 | 21 |
5 | VCC | A7 | 20 |
6 | TE | A6 | 19 |
7 | D2 | A5 | 18 |
8 | D3 | A4 | 17 |
9 | D4 | A3 | 16 |
10 | D5 | A2 | 15 |
11 | D6 | A1 | 14 |
12 | D7 | A0 | 13 |
Figure 6: KH Series Transmitter Pinout (Top View)
PIN DESCRIPTIONS
Pin # | Name | Description | |
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| Level Adjust. This line can be used to adjust the output | |
1 | GND / LADJ | power level of the transmitter. Connecting to GND will give | |
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| the highest output, while placing a resistor to GND will | |
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| lower the output level. | |
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| Data Input Lines. When TE goes high, the module will | |
2, 3, | D0 - D1 | encode the state of these lines for transmission. Upon | |
receipt of a valid transmission, the receiver / decoder will | |||
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| replicate these lines on its output lines. | |
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4 | GND | Analog Ground | |
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5 | VCC | Supply Voltage | |
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| Transmit Enable Line. When this line goes high, the | |
6 | TE | module will encode the states of the address and data lines | |
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| into a packet and transmit the packet three times. | |
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| Address Lines. The state of these lines must match the | |
| state of the receiver’s address lines in order for a | ||
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| transmission to be accepted. | |
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23 | GND | Analog Ground | |
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24 | ANT | ||
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MODULE DESCRIPTION
The KH Series transmitter / encoder module combines a
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| Address Inputs |
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| TX Enable |
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| SAW |
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50Ω RF OUT | Oscillator |
| Divider |
| Parallel |
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| OSC | Inputs | ||
(ANT) |
| Sync |
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Keyed Output |
| Counter | GATE |
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| RF Amplifier | Buffer |
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Output Isolation |
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& Filter |
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RF STAGE | ENCODER STAGE |
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Figure 7: KH Series Transmitter Block Diagram
THEORY OF OPERATION
The KH Series transmitter operation is straightforward. When the Transmit Enable (TE) line is taken high, the
The transmitter section is based on a simple, but
The transmitted signal may be received by any Linx KH Series receiver / decoder module or Linx LC or LR Series receiver combined with the appropriate decoder IC. Once data is received, it is decoded using a decoder IC or custom microcontroller. The transmitted address bits are checked against the address settings of the receiving device. If a match is confirmed, the decoder’s outputs are set to replicate the transmitter’s inputs.
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