Analog Devices AD9843A Temperature Package Model Range Description Option, Thermal Resistance

					AD9843A
(CL = 20 pF, fSAMP = 20 MHz, CCD-Mode Timing in Figures 5 and 6, AUX-Mode Timing in Figure 7.
TIMING SPECIFICATIONS Serial Timing in Figures 8–10.)
Parameter	Symbol	Min	Typ	Max		Unit
SAMPLE CLOCKS
DATACLK, SHP, SHD Clock Period	tCONV	48	50			ns
DATACLK High/Low Pulsewidth	tADC	20	25			ns
SHP Pulsewidth	tSHP	7	12.5			ns
SHD Pulsewidth	tSHD	7	12.5			ns
CLPDM Pulsewidth	tCDM	4	10			Pixels
CLPOB Pulsewidth1	tCOB	2	20			Pixels
SHP Rising Edge to SHD Falling Edge	tS1	0	12.5			ns
SHP Rising Edge to SHD Rising Edge	tS2	20	25			ns
Internal Clock Delay	tID		3.0			ns
Inhibited Clock Period	tINH	10				ns
DATA OUTPUTS
Output Delay	tOD		14.5	16		ns
Output Hold Time	tH	7.0	7.6			ns
Pipeline Delay			9			Cycles
SERIAL INTERFACE
Maximum SCK Frequency	fSCLK	10				MHz
SL to SCK Setup Time	tLS	10				ns
SCK to SL Hold Time	tLH	10				ns
SDATA Valid to SCK Rising Edge Setup	tDS	10				ns
SCK Falling Edge to SDATA Valid Hold	tDH	10				ns
SCK Falling Edge to SDATA Valid Read	tDV	10				ns

NOTES

1Minimum CLPOB pulsewidth is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp performance.

Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS

	With
	Respect
Parameter	To	Min	Max	Unit
AVDD1, AVDD2	AVSS	–0.3	+3.9	V
DVDD1, DVDD2	DVSS	–0.3	+3.9	V
DRVDD	DRVSS	–0.3	+3.9	V
Digital Outputs	DRVSS	–0.3	DRVDD + 0.3	V
SHP, SHD, DATACLK	DVSS	–0.3	DVDD + 0.3	V
CLPOB, CLPDM, PBLK	DVSS	–0.3	DVDD + 0.3	V
SCK, SL, SDATA	DVSS	–0.3	DVDD + 0.3	V
VRT, VRB, CMLEVEL	AVSS	–0.3	AVDD + 0.3	V
BYP1-4, CCDIN	AVSS	–0.3	AVDD + 0.3	V
Junction Temperature			150	°C
Lead Temperature			300	°C
(10 sec)

ORDERING GUIDE

	Temperature	Package	Package
Model	Range	Description	Option
AD9843AJST	–20°C to +85°C	Thin Plastic	ST-48
		Quad Flatpack
		(LQFP)

THERMAL CHARACTERISTICS

Thermal Resistance

48-Lead LQFP Package θJA = 92°C

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9843A features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

REV. 0 –5–