Chapter 10. Statistics

Signal Timeouts

Total T391 timeouts that have occurred since the last reset.

Signal Errors

Total signal frames received with PVC signaling protocol viola- tions.

Frames In

Total received frames since last reset.

Frames Out

Total transmitted frames since last reset.

Errored Frames

Total errored frames received since last reset.

CRC Errors

Number of frames received with HDLC CRC violations.

Abort Frames

Total frames received without a closing flag.

Octet Align

Number of frames received with a bit count that does not fall on 8-bit boundaries.

Port UA Time

Time in seconds the DCE port is unavailable for data delivery.

This can mean that the data link is down or in test, or that the

PVC signaling state is down.

DBU Port Statistics Available on Front Panel

DBU statistics are only available if an ESP DBU card is installed.

DBU Status

Current state of the DBU circuit.

Time in DBU

The amount of time (in seconds) that the unit has been in dial backup mode.

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ADTRAN 1204006L1, 1200214L1, 1204002L1 user manual DBU Port Statistics Available on Front Panel, Frames Out

1204002L1, 1200214L1, 1204006L1 specifications

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