Advantech AIMB-250 Series, B. If driven on Pipe B, then the LVDS port must be disabled

Models: AIMB-250

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AIMB-250 Series

The Intel 855GME GMCH has four display ports, one analog and three digital. With these interfaces, the GMCH can provide support for a progressive scan analog monitor, a dedicated dual channel LVDS LCD panel, and two DVO devices. Each port can transmit data according to one or more protocols. The data that is sent out the display port is selected from one of the two possible sources, Pipe A or Pipe B.

The Intel 855GME GMCH have an integrated dual channel LFP Transmitter interface to support LVDS LCD panel resolutions up to UXGA The display pipe provides panel up-scaling to fit a smaller source image onto a specific native panel size, as well as provides panning and centering support. The LVDS port is only supported on Pipe B. The LVDS port can only be driven by Pipe B, either independently or simultaneously with the Analog Display port. Spread Spectrum Clocking is supported: center and down spread support of 0.5%, 1%, and 2.5% utilizing an external SSC clock.

The DVO B/C interface is compliant with the DVI Specification 1.0. When combined with a DVI compliant external device (e.g. TMDS Flat Panel Transmitter, TV-out encoder, etc.), the GMCH provides a high-speed interface to a digital or analog display (e.g. flat panel, TV monitor, etc.). The DVO ports are connected to an external display device. Examples of this are TV-out encoders, external DACs, LVDS transmitters, and TMDS transmitters. Each display port has control signals that may be used to control, configure and/or determine the capabilities of an external device. The GMCH provides two DVO ports that are each capable of driving a 165-MHz pixel clock at the DVO B or DVO C interface. When DVO B and DVO C are combined into a single DVO port, then an effective pixel rate of 330 MHz can be achieved. The DVO B/C ports can be driven by Pipe A or Pipe

B. If driven on Pipe B, then the LVDS port must be disabled.

The ICH4 is a highly integrated multifunctional I/O Controller Hub that provides the interface to the PCI Bus and integrates many of functions needed in today’s PC platform. The GMCH and ICH4 communicate over a dedicated hub interface. The ICH4 functions and capabilities include:

PCI Rev. 2.2 compliant with support for 33MHz PCI operations

Supports up to 6 Request/Grant pairs (PCI slots)

Power management logic support

Enhanced DMA controller, interrupt controller, and timer functions

Integrated IDE controller; Ultra ATA/100/66/33

USB host interface; 3 host controllers and supports 6 USB ports; includes a EHCI high-speed 2.0 USB controller

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Advantech user manual AIMB-250 Series, B. If driven on Pipe B, then the LVDS port must be disabled