Agilent Technologies 16750A, B Solving Logic Analysis Problems

108

Chapter 2: Task Guide

Solving Logic Analysis Problems

Solving Logic Analysis Problems

• “To test the logic analyzer hardware” on page 108

See Also • “If nothing happens when you start a measurement” on page86

• “If the captured data doesn't look correct” on page 92

• “If there are filtered data holes in display memory” on page 92

To test the logic analyzer hardware

In order to verify that the logic analyzer hardware is operational, run

the Self Test utility. The Self Test function of the logic analysis system

performs functional tests on both the system and any installed

modules.

1. Disconnect all probes of the logic analyzer module.

2. If you have any work in progress, save it to a configuration file. (see the

Agilent Technologies 16700A/B-Series Logic Analysis System help

volume)

3. Disconnect all loads, adapters, or analysis probes from the probe cable

ends.

4. From the system window, select the System Admin icon.

5. Select the Admin tab, then Self Test....

The system closes all windows before starting up Self Test.

6. Select Master Frame.

If the module is in an expansion frame, select Expansion Frame.

7. Select the logic analyzer that you want to test.

8. In the Self Test dialog box , select Tes t Al l.

You can also run individual tests by selecting them. Tests that require you

to do something must be run this way.

Contents

Main Agilent Technologies 16750A/B Logic Analyzer Page Page Page To select transitional timing or store qualified 37 Formatting Labels for Logic Analyzer Probes 57 Setting Up Triggers and Running Measurements 64 Displaying Captured Data 88 Page Importing Netlist and ASCII Files 121 The Trigger Tab 146 The Symbols Tab 159 Error Messages 170 Specifications and Characteristics 186 Page Page Page Step 1. Connect the logic analyzer to the device under test Step 2. Choose the sampling mode Page Next: Step 3. Format labels for the probed signals on page17 Step 3. Format labels for the probed signals Page Next: Step 4. Define the trigger condition on page20 Step 4. Define the trigger condition Step 5. Run the measurement Step 6. Display the captured data Page For More Information... Page Example: Timing measurement on counter board Page Example: State measurement on counter board Page Page Page Page Probing the Device Under Test Page Page Choosing the Sampling Mode Selecting the Timing Mode (Asynchronous Sampling) To select transitional timing or store qualified More on Store Qualification in Transitional Timin g More on Storing Transitions Transitional Timing Considerations To select the timing mode You can also select the timing sampling mode in the Pod Assignment Dialog on page 130. To select the full/half channel configuration To specify the sample period The sample rate is the inverse of the sample period. Selecting the State Mode (Synchronous Sampling) To select the state mode You can also select the state sampling mode in the Pod Assignment Dialog on page 130. To select the 200 MHz/400 MHz state speed configuration To change the sampling clock mode Page To set up the sampling clock To automatically adjust sampling positions Page Page To manually adjust sampling positions Page (The actual sampling position is in the middle of the setup/hold window.) In Either Timing Mode or State Mode In Conventional Timing Mode, when a Run is started, the analyzer will To specify the trigger position To set acquisition memory depth To name an analyzer To turn an analyzer off or on Using 2 GHz Timing Zoom To turn Timing Zoom on or off To set the Timing Zoom trigger position Page Formatting Labels for Logic Analyzer Probes To assign pods to one or two analyzers To set pod threshold voltages To assign probe channels to labels Page To change the label polarity To reorder bits in a label To turn labels off or on Page Setting Up Triggers and Running Measurements Using Trigger Functions To select a trigger function To specify a label pattern event Label pattern events let you specify patterns or ranges on a bus. Label edge events let you specify edges and glitches on a bus. Label To specify a label edge event edge events are only available in certain timing mode trigger functions. To break down a trigger function To create a trigger function library Page Using State Mode Trigger Features To count states or time To Specify Default Storing To specify whether default storing is initially on or off Editing the Trigger Sequence To insert/replace/delete sequence levels To cut/copy-and-paste sequence levels To specify a level's goto or trigger action To send e-mail when the trigger occurs Page the protocol. On the Internet, there are the following TCP/IP protocols: To view a picture of the trigger sequence To clear the trigger sequence Editing Advanced Trigger Functions To specify a duration or occurrence count for events (timing mode) To insert a store action (state mode) To insert timer actions/events To insert counter actions/events To insert flag actions/events Page To insert a "reset occurrence counter" action To group events event list, you can specify their evaluation order by grouping the events. To use named events Saving/Recalling Trigger Setups To save a trigger setup To recall a trigger setup To clear the trigger save/recall list Running Measurements After you set up a trigger, you're ready to run the logic analyzer measurement. To start/stop measurements If nothing happens when you start a measurement To view the trigger status Displaying Captured Data To open Waveform or Listing displays To display Timing Zoom data To use other display tools Page If the captured data doesn't look correct If there are filtered data holes in display memory To display symbols for data values To cancel the display processing of captured data You can cancel the processing of captured data if it is taking too long. Using Symbols To load object file symbols To adjust symbol values for relocated code To create user-defined symbols To enter symbolic label values When entering label values in the trigger sequence: To create an ASCII symbol file General-purpose ASCII symbol files are created with text editing/ processing tools. To create a readers.ini file If a file only has an ELF section this will have no effect and the ELF This option must be specified in the Nsr section of the Readers.ini file: Page Page Printing/Exporting Captured Data Page Cross-Triggering To cross-trigger between two analyzers To cross-trigger with another instrument Solving Logic Analysis Problems To test the logic analyzer hardware Page Saving and Loading Logic Analyzer Configurations Page Page Page Page The Sampling Tab Timing Mode When you select Timing Mode, the Timing Mode Controls area appears. State Mode When you select State Mode, the State Mode Controls area appears. Page The Format Tab Page Importing Netlist and ASCII Files Page Exporting ASCII Files Importing ASCII Files Page Page Page Mapping Connector Names Import the Net List File Verify Net to Label Mapping Page Pod Assignment Dialog Sampling Positions Dialog Eye Finder Option, Setup Tab Page Eye Finder Option, Results Tab Page Page Page Page Page Page Page Eye Finder Option, File Info Tab Page Manual Setup/Hold Option When you select Manual Setup/Hold, the following options appear. Page The Trigger Tab Trigger Functions Subtab General Timing Trigger Functions Page General State Trigger Functions Page Page Advanced Trigger Functions Settings Subtab Overview Subtab This tab gives a picture of the trigger sequence. Default Storing Subtab Status Subtab Save/Recall Subtab Page The Symbols Tab Page Symbols Selector Dialog Search Pattern Offset By Option Align to x Byte Option Symbol File Formats General-Purpose ASCII (GPA) Symbol File Format GPA Record Format Summary records. SECTIONS Use SECTIONS to define symbols for regions of memory, such as sections, segments, or classes. FUNCTIONS Use FUNCTIONS to define symbols for program functions, procedures or subroutines. VARIABLES You can specify symbols for variables using: If you specify only the address of a variable, the size is assumed to be 1 byte. SOURCE LINES Use SOURCE LINES to associate addresses with lines in your source files. START ADDRESS Comments Error Messages Must assign Pod 1 on the master card to specify actions for flags Branch expression is too complex Page If the following sequence does not compile: This one may: If the following sequence does not compile: This one may: Page Cannot specify range on label with clock bits that span pod pairs Counter value checked as an event, but no increment action specified Goto action specifies an undefined level Maximum of 32 Channels Per Label Page No more Pattern resources available for this pod pair No Trigger action found in the trace specification Slow or Missing Clock Timer value checked as an event, but no start action specified Trigger function initialization failure Trigger inhibited during timing prestore Trigger Specification is too complex Combiner resource allocation guidelines: Waiting for Trigger Some strategies you can use when verifying or debugging trigger sequence levels are: Analyzer armed from another module contains no "Arm in from IMB" event Specifications and Characteristics Agilent 16750A/B Logic Analyzer Specifications Agilent 16750A/B Logic Analyzer Characteristics 187 Chapter 3: Reference Specifications and Characteristics 188 Chapter 3: Reference Specifications and Characteristics What is a Specification? What is a Characteristic? Page Page Understanding Logic Analyzer Triggering The Conveyor Belt Analogy Page Summary of Triggering Capabilities Sequence Levels Page Page Boolean Expressions Branches Edges Ranges Flags Occurrence Counters and Global Counters Timers Storage Qualification Page Strategies for Setting Up Triggers Trigger Functions Page Page Setting Up Complex Triggers Document Your Trigger Sequences Conclusions Understanding State Mode Sampling Positions