IC, LC78622ED

Pin No.

Pin Name

I/O

 

 

 

Description

 

 

 

 

 

 

 

1

DEFI

I

Defect sense signal (DEF) input pin. (Connect to 0V when not used).

 

 

 

 

 

 

 

2

TAI

I

 

Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.

 

 

 

 

 

 

 

3

PDO

O

 

Phase comparator output pin to control external VCO.

 

 

 

 

GND pin for built-in VCO. Be sure to connect to 0V.

4

VVSS

For PLL.

 

 

 

 

 

5

ISET

I

Pin to which external resistor adjusting the PD0 output current.

 

 

 

 

 

Power supply pin for built-in VCO.

6

VVDD

 

 

 

 

 

 

 

 

7

FR

I

 

Pin for VCO frequency range adjustment.

 

 

 

 

 

 

 

8

VSS

Digital system GND. Be sure to connect to 0V.

 

 

 

 

 

 

 

9

EFMO

O

For slice level control.

EFM signal output pin.

 

 

 

 

10

EFMIN

I

EFM signal input pin.

 

 

 

 

 

 

 

 

 

 

11

T2

I

Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.

 

 

 

 

 

 

 

12, 13

CLV+, CLK-

O

Disc motor control output. Three level output is possible using command.

 

 

 

 

 

 

 

14

___

O

Rough servo or phase control automatic selection monitoring output pin. Rough servo

V/P

at H. Phase servo at L.

 

 

 

 

 

 

 

 

 

 

15

HFL

I

Track detect signal input pin. Schmidt input.

 

 

 

 

 

 

 

16

TES

I

Tracking error signal input pin. Schmidt input.

 

 

 

 

 

 

 

17

TOFF

O

Tracking OFF output pin.

 

 

 

 

 

 

 

18

TGL

O

Tracking gain selection output pin. Gain boost at L.

 

 

 

 

 

 

 

19, 20

JP+, JP-

O

Track jump control signal output pin. Three level output is possible using command.

 

 

 

 

 

 

 

21

PCK

O

EFM data playback clock monitoring pin 4.3218 MHz when phase is locked in.

 

 

 

 

 

 

 

22

FSEQ

O

Sync signal detection output pin. H when the sync signal which is detected from EFM

signal and thesync signal which is internally generated agree.

 

 

 

 

 

 

 

 

 

 

23

VDD

Digital system power supply pin.

 

 

 

 

 

 

 

24

SL+

O

Moves the sled to outer circumference.

 

 

 

 

 

 

 

25

SL-

O

Moves the sled to inner circumference.

 

 

 

 

 

 

 

26

CONT3 (NC)

Not connected.

 

 

 

 

 

 

 

27

PUIN

I

CD pickup inner switch detection.

 

_______

 

 

 

 

 

28

RW

O

Read, wright signal.

 

 

 

 

 

 

 

29

EMPH

O

De-emphasis monitor output pin. De-emphasis disc is being played back at H.

 

 

 

 

 

 

 

30

C2F

O

C2 flag output pin.

 

 

 

 

 

 

 

31

DOUT

O

DIGITAL OUT output pin. (EIAJ format).

 

 

 

 

 

 

 

32, 33

T3, T4

I

Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.

 

 

 

 

 

 

 

34

N.C.

Not used. Set the pin to open.

 

 

 

 

 

 

 

35

MUTEL

O

 

 

 

L-channel mute output pin.

 

 

 

 

 

 

L-channel power supply pin.

36

LVDD

L-channel 1-bit DAC.

 

 

 

 

 

37

LCHO

O

 

 

 

L-channel output pin.

 

 

 

 

 

 

 

38

LVSS

 

 

 

L-channel GND. Be sure to connect to 0V.

 

 

 

 

 

 

 

39

RVSS

 

 

 

R-channel GND. Be sure to connect to 0V.

 

 

 

 

 

 

R-channel output pin.

40

RCHO

O

R-channel 1-bit DAC.

 

 

 

 

 

41

RVDD

 

 

 

R-channel power supply pin.

 

 

 

 

 

 

R-channel mute output pin.

42

MUTER

O

 

 

 

 

 

 

 

 

 

 

31

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Image 21
Aiwa CSD-TD51, CSD-TD53 Defi, Vvss, Iset, Vvdd, Vss, Clv+, Clk, Hfl, Fseq, Vdd, Sl+, C2F, Lvdd, Lcho, Lvss, Rvss, Rvdd

CSD-TD52, CSD-TD53, CSD-TD51 specifications

The Aiwa CSD-TD51, CSD-TD53, and CSD-TD52 are a triumvirate of compact stereo cassette players that evoke nostalgia while integrating modern technology for an enhanced audio experience. These models, crafted with precision by Aiwa, a brand renowned for its dedication to quality audio equipment, cater to both audiophiles and casual listeners alike.

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