American Dynamics PMC-4U-CACI user manual PMC4USCCIVEC

PMC4U_SCC_IVEC

[0X0C] PMC-4U SCC Interrupt Acknowledge/Vector Read

A read from this address causes the SCC interrupt acknowledge signal to be asserted. If an interrupt condition exists in the SCC, it will respond by placing an interrupt vector on the local data bus. This vector is specified by the user and, depending on the state set in the SCC registers, may contain status information about the cause of the interrupt.

PMC4U_DIR_TERM

[0X10] PMC-4U Direction and Termination Port read/write

CONTROL DIR_TERM REGISTER
DATA BIT	DESCRIPTION
31-20	spare
19-16	TERMination	3-0	1	= terminated
15-3	spare
2-0	DIRection	2-0	0	= read 1 = drive
FIGURE 7	PMC-4U DIRECTION TERMINATION CONTROL BIT MAP

The direction and termination for each of the 16 differential pairs is controlled through this port. The bits default to ‘0’, which corresponds to tri-stating the drivers with no termination.

CONTROL	CORRESPONDING IO BITS
DIR0	IO_0..7
DIR1	IO_8..11
DIR2	IO_12..13

In this design the direction of IO lines 14 and 15 are controlled by the RTS line of the SCC channel B to allow this signal to control the SCC Tx B enable.

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