Aspire Digital 7730G manual Bios

POST Code	Function	Phase	Component
0x6A	Display external cache size on the screen if it is non-	LBT	Core
	zero.
0x6C	Display shadow message	LBT	Core
0xCA	post EISA init	LBT	Core
0x70	Check flags in CMOS and in the TrustedCore data	LBT	Core
	area for errors detected during POST. Display error
	messages on the screen.
0x72	Check status bits to see if configuration problems	LBT	Core
	were detected. If so, display error messages on the
	screen.
0x4F	Initialize MultiBoot. Allocate memory for old and new	LBT	Core
	MultiBoot history tables.
0xCD	Reclaim console vector after HW vectors initialized.	LBT	Core
0x7D	Initialize Intelligent System Monitoring.	LBT	Core
0x7E	The Coprocessor initialization test. Use the floating	LBT	Core
	point instructions to determine if a coprocessor
	exists instead of the ET bit in CR0.
0xC1	Check Boot Type (Server BIOS)	LBT	Core
0x80	Disable onboard COM and LPT ports before testing	LBT	Core
	for presence of external I/O devices.
0xCA	Redirect Int 15h to enable target board to use remote	LBT	Core
	keyboard (PICO BIOS).
0x88	Initialize interrupt controller.	LBT	Core
0x81	Run late device initialization routines.	LBT	Core
0x87	Initialize motherboard configurable devices.	LBT	Core
0x85	Display any ESCD read errors and configure all PnP	LBT	Core
	ISA devices.
0x82	Test and identify RS232 ports.	LBT	Core
0x84	Test and identify parallel ports.	LBT	Core
0x86	Initialize onboard I/O and BDA according to CMOS	LBT	Core
	and presence of external devices.
0x83	Configure Fisk Disk Controller.	LBT	Core
0xCE	Initialize digitizer device and display installed	LBT	Core
	message if successful.
0x89	Enable non-maskable interrupts.	LBT	Core
0x8C	Initialize both of the floppy disks and display an error	LBT	Core
	message if failure was detected. Check both drives
	to establish the appropriate diskette types in the
	TrustedCore data area
0xCB	Redirect Int 13h to Memory Technologies Devices	LBT	Core
	such as ROM, RAM, PCMCIA, and serial disk (PICO
	BIOS).
0xCD	Remap I/O and memory address space for PCMCIA	LBT	Core
	(PICO BIOS).
0x90	Initialize hard-disk controller. If the CMOS ram is	LBT	Core
	valid and intact, and fixed disks are defined, call the
	fixed disk init routine to initialize the fixed disk
	system and take over the appropriate interrupt
	vectors.

152 Chapter 4