Chapter 3
DRAM WRITE to READ Delay [Auto]
Configuration options: [Auto] [1] – [15]
DRAM CKE Minimum pulse width [Auto]
Configuration options: [Auto] [1] – [15]
DRAM CAS# Write to Latency [Auto]
Configuration options: [Auto] [1] – [31]
RTL IOL control
DRAM RTL (CHA_R0D0) [Auto] Configuration options: [Auto] [1] - [63]
DRAM RTL (CHA_R0D1) [Auto] Configuration options: [Auto] [1] - [63]
DRAM RTL (CHA_R1D0) [Auto] Configuration options: [Auto] [1] - [63]
DRAM RTL (CHA_R1D1) [Auto] Configuration options: [Auto] [1] - [63]
DRAM RTL (CHB_R0D0) [Auto] Configuration options: [Auto] [1] - [63]
DRAM RTL (CHB_R0D1) [Auto] Configuration options: [Auto] [1] - [63]
DRAM RTL (CHB_R1D0) [Auto] Configuration options: [Auto] [1] - [63]
DRAM RTL (CHB_R1D1) [Auto] Configuration options: [Auto] [1] - [63]
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
Third Timings tRDRD [Auto]
Configuration options: [Auto] [1] – [7]
Chapter 3: BIOS setup |