Asus P3B-1394 4.5Chipset Features Setup, Details of Chipset Features Setup, Chipset Features, DRAM Idle Timer (8T), SDRAM CAS Latency (2T), SDRAM RAS to CAS Delay (2T)

4.BIOS SETUP

4.5Chipset Features Setup

This “Chipset Features Setup” option controls the configuration of the board’s chipset. Control keys for this screen are the same as for the previous screen.

NOTE: SETUP Defaults are noted in parenthesis next to each function heading.

Details of Chipset Features Setup

SDRAM Configuration (By SPD)

This sets the optimal timings for items 2-5. Leave on default setting.

SDRAM CAS Latency (2T)

This controls the latency between SDRAM read command and the time that the data actually becomes available. Leave on default setting.

SDRAM RAS to CAS Delay (2T)

This controls the latency between SDRAM active command and the read/write com- mand. Leave on default setting.

SDRAM RAS Precharge Time (2T)

This controls the idle clocks after issuing a precharge command to SDRAM. Leave on default setting.

DRAM Idle Timer (8T)

This controls the idle clocks before closing an opened SDRAM page. Leave on default setting.

SDRAM MA Wait State (Normal)

This controls the leadoff clocks for CPU read cycles. Leave on default setting.

Graphics Aperture Size (64MB)

Memory-mapped, graphics data structures can reside in a Graphics Aperture. Leave on default setting.

.4 SETUPBIOS

Chipset Features

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