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Atmel AT89C5132 27, VDD = 2.7 to 3.3 V, TA = -40 to +85C, 6.3.4.2 Waveforms Figure 6-16. Two Wire Wa veforms

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4173ES–USB–09/07

AT89C5132

VDD = 2.7 to 3.3 V, TA = -40 to +85°C

Notes: 1. At 100 kbit/s. At other bit-rates this value is inversely proportional to the bit-rate of 100 kbit/s.

2. Determined by the external bus-line capacitance and the external bus-line pull-up resistor, this

must be < 1 μs.

3. Spikes on the SDA and SCL lines with a duration of less than 3·TCLCL will be filtered out. Maxi-

mum capacitance on bus-lines SDA and

SCL= 400 pF.

4. TCLCL= TOSC= one oscillator clock period.

6.3.4.2 WaveformsFigure 6-16. Two Wire Wa veforms

Symbol Parameter

INPUT

Min

Max

OUTPUT

Min

Max

THD; STA Start condition hold time 14·TCLCL(4) 4.0 μs(1)

TLOW SCL low time 16·TCLCL(4) 4.7 μs(1)

THIGH SCL high time 14·TCLCL(4) 4.0 μs(1)

TRC SCL rise time 1 μs-

(2)

TFC SCL fall time 0.3 μs0.3 μs(3)

TSU; DAT1 Data set-up time 250 ns 20·TCLCL(4)- TRD

TSU; DAT2 SDA set-up time (before repeated START condition) 250 ns 1 μs(1)

TSU; DAT3 SDA set-up time (before STOP condition) 250 ns 8·TCLCL(4)

THD; DAT Data hold time 0 ns 8·TCLCL(4) - TFC

TSU; STA Repeated START set-up time 14·TCLCL(4) 4.7 μs(1)

TSU; STO STOP condition set-up time 14·TCLCL(4) 4.0 μs(1)

TBUF Bus free time 14·TCLCL(4) 4.7 μs(1)

TRD SDA rise time 1 μs -

(2)

TFD SDA fall time 0.3 μs0.3 μs(3)

Tsu;D AT1

Tsu;STA

Tsu; DAT2

Thd;STA Thigh

Tlow

SDA

(INPUT/OUTPUT) 0.3 VDD

0.7 VDD

Tbuf

Tsu;STO

0.7 VDD

0.3 VDD

Trd

Tfd

Trc Tfc

SCL

(INPUT/OUTPUT)

Thd;DAT

Tsu;DAT3

START or Repeated START condition START condition

STOP condition

Repeated START condition

Contents

Main Features 1. Description 2. Typical Applications USB Microcontroller with 64K Bytes Flash Memory AT89C5132 2 AT89C5132 3. Block Diagram Figure 3-1. AT89C5132 Block Diagram 3 AT89C5132 TQFP80 4. Pin Description Figure 4-1. AT89C5132 80-pin TQFP Package 4 4.1 Signals 5 AT89C5132 Table 3. Timer 0 and Timer 1 Signal Descri ption Table 2. Clock Signal Description 6 Table 4. Audio Interface Signal Descr iption Table 6. MutiMediaCard Interface Signal Desc ription Table 5. USB Controller Signal Desc ription 7 Table 7. UART Signal Description Table 10. A/D Conv erter Signal Description Table 8. SPI Controller Signal Desc ription Table 9. TWI Controller Signal Description AT89C5132 Table 11. Keypad Interface Si gnal Description Table 13. Syst em Signal Description Table 12. External Access Signal Description 9 AT89C5132 Table 14. Pow er Signal Description 10 4.2 Internal Pin Structure R Table 15. Detaile d Internal Pin Structure 5. Address Spaces Peripherals Clock Generator System Ports Timers/Counters Watchdog Timer AT89C5132 14 6. Electrical Characteristics 6.2.1 Digital Logic 6.1 Absolute Maximum Ratings 6.2 DC Characteristics Table 1. Digital DC Characteristics 15 6.2.2 IDD, IDL and IPD Test Conditions Figure 6-1. IDD Test Condition, Active Mode Table 1. Digital DC Characteristics 16 Figure 6-2. IDL Test Condition, Idle Mode Figure 6-3. IPD Test Condition, Power-Down Mode 6.2.3 A-to-D Converter Table 2. A-to-D Converter DC Characteristics Page Page 19 6.3 AC Characteristics 20 Table 8. External 8-bit Bus Cycle Data Write AC Timings 6.3.1.3 Waveforms Figure 6-8. External 8-bit Bus Cycle Data Read Waveforms Page 22 Table 11. External IDE 16-bit Bus Cycle Data Write AC Timings 23 6.3.2.3 Waveforms Figure 6-10. External IDE 16-bit Bus Cycle Data Read Waveforms Note: D15:8 is written in DAT16H SFR. Figure 6-11. External IDE 16-bit Bus Cycle Data Write Waveforms Note: D15:8 is the content of DAT16H SFR. 24 6.3.3.2 Timings Table 13. SPI Int erface Master AC Timing 25 6.3.3.3 Waveforms Figure 6-12. SPI Slave Waveforms (SSCPHA = 0) Note: 1. Not Defined but generally the LSB of the character which has just been received. Note: 1. Not Defined but generally the MSB of the character which has just been received. Figure 6-13. SPI Slave Waveforms (SSCPHA = 1) 26 Figure 6-14. SPI Master Waveforms (SSCPHA = 0) Note: 1. SS handled by software using general purpose port pin. Figure 6-15. SPI Master Waveforms (SSCPHA = 1) Note: 1. SS handled by software using general purpose port pin. 27 VDD = 2.7 to 3.3 V, TA = -40 to +85C 6.3.4.2 Waveforms Figure 6-16. Two Wire Wa veforms 28 6.3.5.3 Waveforms Figure 6-17. MMC Input Output Waveforms 29 Note: 32-bit format with Fs = 48 kHz. 6.3.6.3 Waveforms Figure 6-18. Audio Interface Waveforms 30 31 6.3.7.3 Waveforms Figure 6-19. Analog-to-Digital Converter Internal Waveforms Figure 6-20. Analog-to-Digital Converter Characteristics ADEN Bit ADSST Bit T T AT89C5132 33 6.3.9.2 Timings Table 22. Externa l Clock AC Timings VDD = 2.7 to 3.3V, TA= -40 to +85C 6.3.9.3 Waveforms Figure 6-23. External Clock Waveform Figure 6-24. AC Testing Input/Output Waveforms Figure 6-25. Float Waveforms 7. Ordering Information Possible Order Entries Page Page 9. Datasheet Revision History for AT89C5132 Atmel Corporation Atmel Operations Regional Headquarters Europe Asia Japan