20
4173ES–USB–09/07
AT89C5132
Table 8. External 8-bit Bus Cycle – Data Write AC Timings
VDD = 2.7 to 3.3V, TA = -40° to +85°C
6.3.1.3 WaveformsFigure 6-8. External 8-bit Bus Cycle – Data Read Waveforms
Symbol Parameter
Variable Clock
Standard Mode Variable Clock
X2 Mode
UnitMin Max Min Max
TCLCL Clock Period 50 50 ns
TLHLL ALE Pulse Width 2·TCLCL-15 TCLCL-15 ns
TAVLL Address Valid to ALE Low TCLCL-20 0.5·TCLCL-20 ns
TLLAX Address hold after ALE Low TCLCL-20 0.5·TCLCL-20 ns
TLLWL ALE Low to WR Low 3·TCLCL-30 1.5·TCLCL-30 ns
TWLWH WR Pulse Width 6·TCLCL-25 3·TCLCL-25 ns
TWHLH WR High to ALE High TCLCL-20 TCLCL+20 0.5·TCLCL-20 0.5·TCLCL+20 ns
TAVWL Address Valid to WR Low 4·TCLCL-30 2·TCLCL-30 ns
TQVWH Data Valid to WR High 7·TCLCL-20 3.5·TCLCL-20 ns
TWHQX Data Hold after WR High TCLCL-15 0.5·TCLCL-15 ns
TAVDV
TLLAX TRHDX
TRHDZ
TAVLL
TAVRL
P2
P0
RD
ALE TLHLL TRLRH
Data In
A15:8
TRLAZ
TLLRL TRHLH
TRLDV
D7:0A7:0