Casio CTK-650 manual Circuit Description, CPUHD6433298A16P H8/329

CIRCUIT DESCRIPTION

CPU(HD6433298A16P : H8/329)

The 16-bit CPU contains a 32K-byte ROM, a 1K-byte RAM, an 8-bit A/D converter, timers and I/O ports. The CPU accesses to the DSP, Key Touch LSI, RAM, buttons and LEDs. But the CPU directly receives MIDI and pedal signals.

Pin No.	Terminal	In/Out					Function
1	P40/IRQ2	In	KO signal data.
2	P41/IRQ1	In	Timing signal for KO signal.
3	P42/IRQ0	In	APO signal output.
4	P43/-RD	Out	Read signal outpt.
5	P44/-WR	Out	Write signal output.
7	P46/PHI	Out	System clock output.
8	P47/-WAIT	In	Wait signal input
9	P50/Txd	Out	MIDI signal output.
10	P51/Rxd	In	MII signal input.
11	P52/SCK	Out	Reset signal output.
12	-RESET	In	Reset signal input.
13	-NMI	In	Power on signal input.(Low active)
14	Vcc	In	+5V source.
15	-STBY	In	Standby signal input. Connected to +5V.
16	Vss	In	Ground(0V) source.
17,18	XTAL,EXTAL	In/Out	20MHz clock pulse input/output. Connected to crystal.
19,20	MD1,MD0	In	Selection for system.
				MD1	MD0		MODE
				0		1	MODE-1 : Internal ROM mode
				1		0	MODE-2 : Non internal ROM mode
				1		1	MODE-3 : Single chip mode
21	AVss	In	Analog ground source.
22	P70/AN0	In	Connected to ground.
23~29	P71/AN0~P77/AN7	In	KI signal input.
30	AVcc	In	+5V source.
31~38	P60/FTCI~P67/TMO1	Out	Control signal for 7-segment LED.
39	Vcc	In	+5V source.
41~56	P26/A14~P10/A0	Out	Address bus.
48	Vss	In	Ground(0V) source.
57~64	P30/D0~P37/D7	In/Out	Data bus.

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