— 21 —
IC LEAD IDENTIFICATION AND INTERNAL DIAGRAM TIMING
GENERATOR
SHIFT REGISTER
LATCH
MAIN DAC
SUB DAC
SUB DAC
MAIN DAC
LRCK
LRSEL/RSI
SI/LSI
CLK
4/8 fs SEL
D.GND
N.C. D.VDD A.GND A.VDD
R.OUT
R.REF
L.REF
L.OUT
11
10
9
6
8
712
54
3
13
14
15
16
1
2
3
2
1OUT
VDD
VSS
123
45
6
VCC GND
NC
+
-
+
-
1234
5
67
8
VCC
GND
1A 1
1Y 2
2A 3
2Y 4
3A 5
3Y 6
GND 78
9
10
11
5Y
12
6A13
6Y
14 VCC
4A
4Y
5A