4.3.4 Interrupt Source Control

In ISC register (offset 0x20), there are four bits to control the IRQ sources of INT1 and INT2.

If the application need only one IRQ, you can disable one of the IRQ sources by software. If your application doesn't need any IRQ source, you

can disable both interrupts. However, the PCI BIOS still assigns an IRQ level to the PCI card and occupies the PC resource if you only disable the IRQ sources without changing the i nitial condition of the PCI controller.

It is not recommended to change the initial condition of the PCI card through

a user's own application software. If users want to disable the IRQ level, they can use the utility "util DIO 48H.exe" or "util DIO 96H.exe to change

the power on an interrupt setting.

The table 4.3 shows the register format of the ISC (address offset 0x20). This register is write only. The 4 LSBs are used to control the source of INT1 and INT2.

INT1

D3

D2

D1

D0

IRQ Sources

IRQ Trigger Condition

 

 

 

 

 

 

 

Disable

X

X

0

0

INT1 disable

--

Mode 1

X

X

0

1

~P1C0

falling edge of P1C0

Mode 2

X

X

1

0

P1C0 OR ~P1C3

(see following)

Mode 3

X

X

1

1

Event Counter

Counter count down to 0

INT2

D3

D2

D1

D0

IRQ Sources

IRQ Trigger Condition

 

 

 

 

 

 

 

Disable

0

0

X

X

INT2 disable

--

Mode 1

0

1

X

X

~P2C0

falling edge of P2C0(*)

Mode 2

1

0

X

X

P2C0 OR ~P2C3

(see following) (*)

Mode 3

1

1

X

X

Timer Output

Timer count down to 0

Table 4.3 ISC register format

(*) Note: Not available on PCIDIO 24H.

Then the IRQ

sources

is set as “P1C0 OR ~P1C3”, the IRQ trigger

conditions are summarized in table 4.4.

 

 

 

 

 

 

 

P1/2C0

P1/2C3

 

IRQ Trigger Condition

 

 

High

X

 

PC0=‘H’ disable all IRQ

 

 

X

Low

 

PC3=‘L’ disable all IRQ

 

 

Low

1->0

 

PC3 falling edge trigger when PC0=L

 

 

0->1

High

 

PC0 rising edge trigger when PC3=H

 

Table 4.4 IRQ Trigger conditions

Because the P1/P2C0 and P1/P2C3 are external signals, the users can utilize the combination of the four signals to generate a proper IRQ.

28 Operation Theorem