Chapter 3 Registers Format...................................................

20

3.1

PCI PnP Registers......................................................................................

20

3.2

I/O Address Map.........................................................................................

21

Chapter 4 Operation Theorem...............................................

22

4.1

Digital I/O Ports...........................................................................................

22

4.1.1

Introduction .........................................................................................

22

4.1.2

8255 Mode 0........................................................................................

22

4.1.3 Special Function of the DIO Signals ..............................................

22

4.1.4 Digital I/O Port Programming..........................................................

23

4.1.5

Control Word.......................................................................................

23

4.1.6

Power on Configuration ...................................................................

24

4.1.7 Note for Output Data.........................................................................

24

4.2

Timer/Counter Operation .........................................................................

25

4.2.1

Introduction .........................................................................................

25

4.2.2

General Purpose Timer/Counter....................................................

25

4.2.2 Cascaded 32 Bits Timer...................................................................

26

4.2.3 Event Counter and Edge Control...................................................

26

4.3

Interrupt Multiplexing................................................................................

26

4.3.1

Architecture........................................................................................

26

4.3.2

IRQ Level Setting ...............................................................................

27

4.3.3 Note for Dual Interrupts ...................................................................

27

4.3.4

Interrupt Source Control..................................................................

28

4.4

12V and 5V Power Supply........................................................................

29

Chapter 5 C/C++ Libraries......................................................

30

5.1

 

Libraries Installation ................................................................................

30

5.2

Programming Guide ..................................................................................

31

5.2.1

Naming Convention...........................................................................

31

5.2.2

Data Types ..........................................................................................

31

5.3

_DIO48H/96H_Initial.................................................................................

32

5.4

Digital Input..................................................................................................

33

5.5

Digital Output...............................................................................................

35

5.6

Configuration Port......................................................................................

36

5.7

Configuration Channel..............................................................................

37

5.8

Set Interrupt Control..................................................................................

39

5.9

Timer Start...................................................................................................

40

5.10

 

Timer Read..............................................................................................

41

5.11

 

Timer Stop ...............................................................................................

42

5.12

 

Cascaded Timer.....................................................................................

43

ii Table of Contents