Cypress CY25822-2 manual Features, Block Diagram, Pin Configuration

CY25822-2

CK-SSC Spread Spectrum Clock Generator

Features

•3.3V operation

•48- and 66-MHz frequency support

•Selectable slew rate control

•350-pS jitter

•I2C programmability

•500-∝A power-down current

•Spread Spectrum for best electromagnetic interference (EMI) reduction

•8-pin SOIC package

Block Diagram			VDD
							REFOUT
Clock Input	Freq.	Phase	Charge			Post	CLKOUT
				Σ			(SSCG Output)
					VCO
	Divider	Detector	Pump			Dividers
	M
SDATA				Modulating
	Logic			Waveform
SCLOCK		Feedback
	Control
PWRDWN#		Divider		PLL
		N
			GND

Pin Configuration

C L K IN 1

V D D 2

G N D 3

C L K O U T 4

C Y 2 5 8 2 2 - 2

* 1 5 0 K Ω P u ll-u p

8*P W R D W N #

7S C L O C K

6S D A T A

5R E F O U T

Cypress Semiconductor Corporation	•	3901 North First Street	•	San Jose , CA 95134	•	408-943-2600
Document #: 38-07531 Rev. **				Revised March 18, 2003

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