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Cypress CY62146E MoBL Figure 8. Write Cycle 3: WE controlled, OE LOW [18], Figure 9. Write Cycle 4: BHE/BLE Controlled, OE LOW [18]

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CY62146E MoBL®

Document Number: 001-07970 Rev. *D Page 8 of 11

Figure 8. Write Cycle 3: WE controlled, OE LOW [18]

Figure 9. Write Cycle 4: BHE/BLE Controlled, OE LOW [18]

Switching Waveforms (continued)

DATAIN

tHD

tSD

tLZWE

tPWE

tSA

tHA

tAW

tSCE

tWC

tHZWE

tBW

NOTE 19

ADDRESS

DATA IO

BHE/BLE

tWC

DATA

tSCE

PWE

tHZWE

tLZWE

NOTE 19

DATA IO

ADDRESS

BHE

/BLE

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Contents

Main CY62146E MoBL 4-Mbit (256K x 16) Static RAM Features Functional Description Logic Block Diagram CY62146E MoBL Pin Configuration Figure 1. 44-Pin TSOP II (Top View) Product Portfolio Product Range VCC Range (V) Speed (ns) Maximum Ratings Operating Range Electrical Characteristics Capacitance Thermal Resistance CY62146E MoBL Data Retention Characteristics Switching Characteristics CY62146E MoBL Switching Waveforms Figure 4. Read Cycle No.1: Address Transition Controlled. [14, 15] Figure 5. Read Cycle No. 2: OE Controlled [15, 16] Document Number: 001-07970 Rev. *D Page 7 of 11 Switching Waveforms Figure 8. Write Cycle 3: WE controlled, OE LOW [18] Figure 9. Write Cycle 4: BHE/BLE Controlled, OE LOW [18] Ordering Information Page Document History Page