Cypress CY62148BN CY62148BN MoBL

CY62148BN MoBL®

Document #: 001-06517 Rev. *A Page 6 of 10

Write Cycle No. 1 (CE Controlled)[13]

Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[13, 14]

Notes:

13.If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.

14.Data I/O is high-impedance if OE = VIH.

15.During this period the I/Os are in the output state and input signals should not be applied.

Switching Waveforms (continued)

tWC

DATA VALID

tAW

tSA

tPWE

tHA

tHD

tSD

tSCE

ADDRESS

DATA I/O

tHD

tSD

tPWE

tSA

tHA

tAW

tSCE

tWC

tHZOE

DATA

INVALID

ADDRESS

DATA I/O

NOTE15

tHZCE

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Contents

Main 4-Mbit (512K x 8) Static RAM CY62148BN MoBL Features Functional Description Logic Block Diagram CY62148BN MoBL Document #: 001-06517 Rev. *A Page 2 of 10 Pin Configuration Product Product Portfolio Maximum Ratings Operating Range Electrical Characteristics Capacitance AC Test Loads and Waveforms CY62148BN MoBL Switching Characteristics[5] Over the Operating Range Document #: 001-06517 Rev. *A Page 5 of 10 Data Retention Characteristics Data Retention Waveform Switching Waveforms Read Cycle No.1 Read Cycle No. 2 (OE Controlled)[11, 12] CY62148BN MoBL Document #: 001-06517 Rev. *A Page 6 of 10 Write Cycle No. 1 (CE Controlled)[13] Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[13, 14] Switching Waveforms Truth Table Ordering Information Switching Waveforms CY62148BN MoBL Document #: 001-06517 Rev. *A Page 8 of 10 Package Diagrams 32LD (450 Mil) SOIC DIMENSIONSIN INCHES[MM] MIN. MAX. PACKAGEWEIGHT 1.42gms Package Diagrams Document History Page