Cypress CY62157ESL Switching Waveforms

CY62157ESL MoBL®

Document #: 001-43141 Rev. ** Page 9 of 12

Figure 6. Write Cycle 3: WE controlled, OE LOW [18]

Figure 7. Write Cycle 4: BHE/BLE Controlled, OE LOW [18]

Switching Waveforms (continued)

DATAIN

tHD

tSD

tLZWE

tPWE

tSA

tHA

tAW

tSCE

tWC

tHZWE

tBW

NOTE 19

ADDRESS

DATA IO

BHE/BLE

tWC

DATA

tSCE

PWE

tHZWE

tLZWE

NOTE 19

DATA IO

ADDRESS

BHE

/BLE

[+] Feedback [+] Feedback

Contents

Main CY62157ESL MoBL 8-Mbit (512K x 16) Static RAM Features Functional Description Logic Block Diagram CY62157ESL MoBL Document #: 001-43141 Rev. ** Page 2 of 12 Pin Configuration Figure 1. 44-Pin TSOP II (Top View) Product Portfolio Maximum Ratings Operating Range Electrical Characteristics Capacitance Thermal Resistance AC Test Loads and Waveforms CY62157ESL MoBL Data Retention Characteristics Data Retention Waveform CY62157ESL MoBL Switching Characteristics CY62157ESL MoBL Switching Waveforms Figure 2. Read Cycle No.1: Address Transition Controlled. [14, 15] Figure 3. Read Cycle No. 2: OE Controlled [15, 16] Figure 4. Write Cycle No 1: WE Controlled [13, 17, 18] Switching Waveforms Figure 6. Write Cycle 3: WE controlled, OE LOW [18] Figure 7. Write Cycle 4: BHE/BLE Controlled, OE LOW [18] Switching Waveforms Truth Table Ordering Information Page Document History Page