Cypress CY7C1019D manual Features, Functional Description, Logic Block Diagram

CY7C1019D

1-Mbit (128K x 8) Static RAM

Features

•Pin- and function-compatible with CY7C1019B

•High speed

—tAA = 10 ns

•Low active power

—ICC = 80 mA @ 10 ns

•Low CMOS standby power

—ISB2 = 3 mA

•2.0V Data retention

•Automatic power-down when deselected

•CMOS for optimum speed/power

•Center power/ground pinout

•Easy memory expansion with CE and OE options

•Functionally equivalent to CY7C1019B

•Available in Pb-free 32-pin 400-Mil wide Molded SOJ and 32-pin TSOP II packages

Functional Description [1]

The CY7C1019D is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected. The eight input and output pins (IO0 through IO7) are placed in a high-impedance state when:

•Deselected (CE HIGH)

•Outputs are disabled (OE HIGH)

•When the write operation is active (CE LOW, and WE LOW).

Write to the device by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight IO pins (IO0 through IO7) is then written into the location specified on the address pins (A0 through A16).

Read from the device by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins appears on the IO pins.

Logic Block Diagram

		INPUT BUFFER								IO0
										IO1
A0
A1	DECODERROW								SENSEAMPS	IO2
A7										IO5
A2			128K x 8
A3										IO3
A4				ARRAY
A5										IO4
A6
A8
										IO6
CE									POWER	IO7
	COLUMN DECODER
WE									DOWN
OE
	9	10	11	12	13	14	15	16
	A	A	A	A	A A A A

Note

1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com.

Cypress Semiconductor Corporation	• 198 Champion Court • San Jose, CA 95134-1709	•	408-943-2600
Document #: 38-05464 Rev. *E	Revised February 22, 2007

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