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CY7C1024DV33
manual
Switching Waveforms, Read Cycle No. 1 Address Transition Controlled 13
Models:
CY7C1024DV33
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DC Electrical Characteristics
Logic Block Diagram
Pin Configuration
Power
PSoC Solutions
AC Switching Characteristics
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Image 6
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Contents
CY7C1024DV33
Features
Logic Block Diagram
Functional Description
Description
Pin Configuration
Selection Guide
Unit
Operating Range
DC Electrical Characteristics
Maximum Ratings
Capacitance
AC Switching Characteristics
Figure 2. AC Test Loads and Waveform4
Parameter Read Cycle
Data Retention Waveform
AC Switching Characteristics continued
Data Retention Characteristics
Conditions
Figure 4. Read Cycle No. 2 OE Controlled 3, 14
Switching Waveforms
Figure 3. Read Cycle No. 1 Address Transition Controlled 13
Figure 5. Write Cycle No. 1 CE Controlled 3, 16
Truth Table
Switching Waveforms continued
Power
Figure 6. Write Cycle No. 2 WE Controlled, OE HIGH During Write 3, 16
Speed
Package Diagram
Ordering Information
Ordering Code
Document Title CY7C1024DV33, 3-Mbit 128K X 24 Static RAM
Sales, Solutions, and Legal Information
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