Cypress CY7C1334H manual Maximum Rating, Operating Range, Ambient Range

CY7C1334H

Maximum Rating

(Above which the useful life may be impaired. For user guide- lines not tested.)

Storage Temperature		−65°C to +150°C
Ambient Temperature with
Power Applied		−55°C to +125°C
Supply Voltage on VDD Relative to GND		−0.5V to +4.6V
Supply Voltage on VDDQ Relative to GND		−0.5V to +VDD
DC Voltage Applied to Outputs
in Tri-State	−0.5V to VDDQ + 0.5V

Electrical Characteristics Over the Operating Range[9, 10]

DC Input Voltage		−0.5V to VDD + 0.5V
Current into Outputs (LOW)			20 mA
Static Discharge Voltage			> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current			> 200 mA
Operating Range
	Ambient
Range	Temperature (TA)	VDD	VDDQ
Com’l	0°C to +70°C	3.3V - 5%/+10%	2.5V - 5% to
			VDD
Ind’l	–40°C to +85°C

Parameter	Description	Test Conditions		Min.	Max.	Unit
VDD	Power Supply Voltage			3.135	3.6	V
VDDQ	I/O Supply Voltage	for 3.3V I/O		3.135	VDD	V
		for 2.5V I/O		2.375	2.625	V
VOH	Output HIGH Voltage	for 3.3V I/O, IOH = –4.0 mA		2.4		V
		for 2.5V I/O, IOH = –1.0 mA		2.0
VOL	Output LOW Voltage	for 3.3V I/O, IOL = 8.0 mA			0.4	V
		for 2.5V I/O, IOL = 1.0 mA			0.4
VIH	Input HIGH Voltage[9]	for 3.3V I/O		2.0	VDD + 0.3V	V
		for 2.5V I/O		1.7	VDD + 0.3V
VIL	Input LOW Voltage[9]	for 3.3V I/O		–0.3	0.8	V
		for 2.5V I/O		–0.3	0.7
IX	Input Leakage Current	GND ≤ VI ≤ VDDQ		–5	5	∝A
	except ZZ and MODE
	Input Current of MODE	Input = VSS		−30		∝A
		Input = VDD			5	∝A
	Input Current of ZZ	Input = VSS		−5		∝A
		Input = VDD			30	∝A
IOZ	Output Leakage Current	GND ≤ VI ≤ VDDQ, Output Disabled		−5	5	∝A
IDD	VDD Operating Supply	VDD = Max., IOUT = 0 mA,	6-ns cycle, 166 MHz		240	mA
	Current	f = fMAX = 1/tCYC
			7.5-ns cycle, 133 MHz		225	mA
ISB1	Automatic CE	VDD = Max, Device	6-ns cycle, 166 MHz		100	mA
	Power-Down	Deselected,
			7.5-ns cycle, 133 MHz		90	mA
	Current—TTL Inputs	VIN ≥ VIH or VIN ≤ VIL
		f = fMAX = 1/tCYC
ISB2	Automatic CE	VDD = Max, Device	All speeds		40	mA
	Power-Down	Deselected, VIN ≤ 0.3V or
	Current—CMOS Inputs	VIN > VDDQ – 0.3V, f = 0
ISB3	Automatic CE	VDD = Max, Device	6-ns cycle, 166 MHz		85	mA
	Power-Down	Deselected, or VIN ≤ 0.3V or
			7.5-ns cycle, 133 MHz		75	mA
	Current—CMOS Inputs	VIN > VDDQ – 0.3V
		f = fMAX = 1/tCYC
ISB4	Automatic CE	VDD = Max, Device	All Speeds		45	mA
	Power-Down	Deselected,
	Current—TTL Inputs	VIN ≥ VIH or VIN ≤ VIL, f = 0

Notes:

9.Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC)> –2V (Pulse width less than tCYC/2).

10. TPower-up: Assumes a linear ramp from 0V to VDD (min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD.

Document #: 38-05678 Rev. *B Page 7 of 13

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