STK14D88
Hardware STORE Cycle
NO. | Symbols | Parameter | STK14D88 | Unit | Notes | |||
Standard | Alternate | Min | Max | |||||
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31 | tDELAY | tHLQZ | Hardware STORE to SRAM Disabled | 1 | 70 | µs | 15 | |
32 | tHLHX |
| Hardware STORE Pulse Width | 15 |
| ns |
| |
Figure 10. Hardware STORE Cycle
32
23
31
Soft Sequence Commands
NO. |
| Symbols | Parameter | STK14D88 |
| Unit | Notes | |
| Standard | Min |
| Max | ||||
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33 | tSS |
| Soft Sequence Processing Time |
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| 70 | µs | 16, 17 |
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| Figure 11. Software Sequence Commands |
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| 33 |
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| 33 |
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Notes
15.Read and Write cycles in progress before HSB is asserted are given this minimum amount of time to complete.
16.This is the amount of time that it takes to take action on a soft sequence command. Vcc power must remain high to effectively register command.
17.Commands like Store and Recall lock out I/O until operation is complete which further increases this time. See specific command.
Document Number: | Page 9 of 17 |
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