STK14D88
Software-Controlled STORE/RECALL Cycle[13, 14]
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| Symbols | Parameter | Unit | Notes | |||||||
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| Alternate |
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| E Cont | Min | Max | Min | Max | Min | Max | |||||
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26 | tAVAV | tRC | STORE/RECALL Initiation Cycle Time | 25 |
| 35 |
| 45 |
| ns | 14 | ||
27 | tAVEL | tAS | Address Setup Time | 0 |
| 0 |
| 0 |
| ns |
| ||
28 | tELEH | tCW | Clock Pulse Width | 20 |
| 25 |
| 30 |
| ns |
| ||
29 | tEHAX |
| Address Hold Time | 1 |
| 1 |
| 1 |
| ns |
| ||
30 | tRECALL |
| RECALL Duration |
| 50 |
| 50 |
| 50 | μs |
| ||
Figure 9. E and G Controlled Software STORE/RECALL Cycle[14]
ADDRESS
E
DQ (DATA
tAVAV26
ADDRESS #1
tAVEL27 
tELEH28
tELAX29
DATA VALID
tAVAV26 |
ADDRESS #6 |
tSTORE23 / tRECALL30 |
HIGH IMPEDANCE |
DATA VALID |
Notes
13.The software sequence is clocked on the falling edge of E controlled READs.
14.The six consecutive addresses must be read in the order listed in the software STORE/RECALL Mode Selection Table. W must be high during all six consecutive cycles.
Document Number: | Page 8 of 17 |
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