Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the device. These user guidelines are not tested.
Storage Temperature | |
Temperature under bias | |
Supply Voltage on VCC Relative to GND | |
Voltage on Input Relative to Vss |
Voltage on | |
Power Dissipation | 1.0W |
DC output Current (1 output at a time, 1s duration) .... 15 mA
Operating Range
Range | Ambient Temperature | VCC |
Commercial | 0°C to +70°C | 3.0V to 3.6V |
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Industrial | 3.0V to 3.6V | |
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DC Electrical Characteristics
Over the operating range (VCC = 3.0V to 3.6V)
Parameter | Description |
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ICC1 | Average VCC Current |
| tRC = 35 ns |
| Commercial |
| 50 | mA | |||||||||
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| Dependent on output loading and cycle rate. |
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| Industrial |
| 52 | mA | ||||||||||
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| Values obtained without output loads. |
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| IOUT = 0 mA. |
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ICC2 | Average VCC Current |
| All Inputs Do Not Care, VCC = Max |
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| 3 | mA | ||||||||
| during STORE |
| Average current for duration tSTORE |
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ICC3 | Average VCC Current at |
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| > (VCC – 0.2V). All other inputs cycling. |
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| 8 | mA | ||||||
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| tRC= 200 ns, 5V, 25°C |
| Dependent on output loading and cycle rate. Values obtained |
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| Typical |
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ISB1 [3] | Average VCC Current |
| tRC=35ns, |
| > VIH |
| Commercial |
| 18 | mA | |||||||
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| (Standby, Cycling TTL |
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| Industrial |
| 19 | mA | ||
| Input Levels) |
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ISB2[3] | VCC Standby Current |
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| 1 | mA | ||||||||||
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| (Standby, Stable CMOS |
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| Input Levels) |
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IIX | Input Leakage Current | VCC = Max, VSS < VIN < VCC |
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| +1 | μA | ||||||||||
IOZ | Off State Output |
| VCC = Max, VSS < VIN < VCC, |
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| > VIH or |
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| < VIL | +1 | μA | |||||
| CE | OE | WE | ||||||||||||||
| Leakage Current |
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VIH | Input HIGH Voltage |
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| 2.2 | VCC + | V |
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VIL | Input LOW Voltage |
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| VSS – | 0.8 | V |
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| 0.5 |
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VOH | Output HIGH Voltage |
| IOUT = |
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VOL | Output LOW Voltage |
| IOUT = 8 mA |
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| 0.4 | V | ||||||||
Data Retention and Endurance
Parameter | Description | Min | Unit |
DATAR | Data Retention | 100 | Years |
NVC | Nonvolatile STORE Operations | 1,000 | K |
Note
3. CE > VIH will not produce standby current levels until any nonvolatile cycle in progress has timed out. |
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Document Number: | Page 6 of 14 |
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