Table 2. Software STORE/RECALL Mode Selection
| CE |
|
| WE |
| A13 – A0 | Mode | IO | Notes |
| L |
|
| H |
| 0x0E38 | Read SRAM | Output Data | [1, 2] |
|
|
|
|
|
| 0x31C7 | Read SRAM | Output Data |
|
|
|
|
|
|
| 0x03E0 | Read SRAM | Output Data |
|
|
|
|
|
|
| 0x3C1F | Read SRAM | Output Data |
|
|
|
|
|
|
| 0x303F | Read SRAM | Output Data |
|
|
|
|
|
|
| 0x0FC0 | Nonvolatile STORE | Output Data |
|
| L |
|
| H |
| 0x0E38 | Read SRAM | Output Data | [1, 2] |
|
|
|
|
|
| 0x31C7 | Read SRAM | Output Data |
|
|
|
|
|
|
| 0x03E0 | Read SRAM | Output Data |
|
|
|
|
|
|
| 0x3C1F | Read SRAM | Output Data |
|
|
|
|
|
|
| 0x303F | Read SRAM | Output Data |
|
|
|
|
|
|
| 0x0C63 | Nonvolatile RECALL | Output Data |
|
Notes
1.The six consecutive addresses must be in the order listed. WE must be high during all six consecutive CE controlled cycles to enable a nonvolatile cycle.
2.While there are 15 addresses on the
Document Number: | Page 5 of 14 |
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