ELAN Home Systems EM78P458, EM78P458AM, EM78P458AP, EM78P459, EM78P459AK, EM78P459AM 2. Code Option Register (Word 1)

EM78P458/459

OTP ROM

1: XTAL type

• Bit 11 (/ENWTD): Watchdog timer enable bit.

0: Enable

1: Disable

• Bit 10 (CLKS): Clocks of each instruction cycle.

0: Two clocks

1: Four clocks

Refer to the section of Instruction Set.

• Bit 9 (/PTB): Protect bit.

0: Enable

1: Disable

• Bit 8 (HLF): XTAL frequency selection.

0: Low frequency

1: High frequency

• Bit 7 (RCT): Resistor Capacitor

0: Inter C, External R

1: External RC

• Bit 6 (HLP): Power consumption selection.

0: Low power.

1: High power.

• Bit 5 ~ Bit 0 (ID[5]~ID[0]): Customer’s ID.

2. Code Option Register (Word 1)

Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4~Bit0

SIGN2 VOF2[2] VOF2[1] VOF2[0] SIGN1 VOF1[2] VOF1[1] VOF1[0] -

• Bit 12 (SIGN2): Polarity bit of offset voltage.

0: Negative voltage

1: Positive voltage

• Bit 11 ~ Bit 9 (VOF2[2]~VOF2[0]): Offset voltage bits

• Bit 8 (SIGN1): Polarity bit of offset voltage.

0: Negative voltage

1: Positive voltage

• Bit 7 ~ Bit 5 (VOF1[2]~VOF210)): Offset voltage bits

• Bit 4 ~ Bit 0 : Not used.

This specification is subject to change without prior notice. 07.01.2003 (V1.3)

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Contents

Main EM78P458/459 Specification Revision History Version Content Application Note 1. GENERAL DESCRIPTION EM78P458/459 2. FEATURES EM78P458/459 3. PIN ASSIGNMENT Page EM78P458/459 OTP ROM RAM ALU 4. FUNCTION DESCRIPTION EM78P458/459 4. R3 (Status Register) 5. R4 (RAM Select Register) 6. R5 ~ R6 (Port 5 ~ Port 6) 7. R7 ~ R8 Fig. 4 Data Memory Configuration 8. R9 (ADCON: Analog to Digital Control) 9. RA (ADDATA: the converted value of ADC) 10. RB 11. RC 12. RD OTP ROM 13. RE 14. RF (Interrupt Status Register) 15. R10 ~ R3F 4.2 Special Purpose Registers 2. CONT (Control Register) 3. IOC50 ~ IOC60 (I/O Port Control Register) 4. IOC90 (GCON: I/O Configuration & Control of ADC ) 5. IOCA0 ( AD-CMPCON ): 6. IOCB0 (Pull-down Control Register) 7. IOCC0 (Open-Drain Control Register) 8. IOCD0 (Pull-high Control Register) 9. IOCE0 (WDT Control Register) 10. IOCF0 (Interrupt Mask Register) 11. IOC51 ( PWMCON ): Page Page OTP ROM 4.3 TCC/WDT & Prescaler OTP ROM 8-bit Counter 8-to-1 MUX Fig. 5 Block Diagram of TCC and WDT 4.4 I/O Ports NOTE: Pull-down is not shown in the figure. Fig. 6 The Ccircuit of I/O Port and I/O Control Register for Port 5 PCRD M U X IOD NOTE: Pull-high (down) and Open-drain are not shown in the figure. Fig. 8 The Circuit of I/O Port and I/O Control Register for P60~P67 Fig. 9 Block Diagram of Port 6 with Input Changed Interrupt/Wake-up OTP ROM 4.5 RESET and Wake-up 1. The function of RESET and Wake-up Page 2. The Status of T, and P of STATUS Register Page OTP ROM 4.6 Interrupt OTP ROM 4.7 Analog-To-Digital Converter (ADC) 1. ADC Control Register (ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90) 2. ADC Data Register (ADDATA/RA) 3. A/D Sampling Time 4. A/D Conversion Time 5. A/D Operation During Sleep Mode 6. Programming Steps/Considerations Page Page OTP ROM 4.8 Dual Sets of PWM ( Pulse Width Modulation ) 1. Overview Fig. 13 The Functional Block Diagram of the Dual PWMs Period Duty Cycle DT1 = TMR1 2. Increment Timer Counter ( TMRX: TMR1H/TWR1L or TMR2H/TWR2L ) 3. PWM Period ( PRDX : PRD1 or PRD2 ) 4. PWM Duty Cycle ( DTX: DT1H/ DT1L and DT2H/ DT2L; DTL: DL1H/DL1L and DL2H/DL2L ) 5. Comparator X 6. PWM Programming Procedures/Steps OTP ROM 4.9 Timer 1. Overview 2. Function description OTP ROM 4.10 Comparator 3. Using as An Operation Amplifier 4. Interrupt 5. Wake-up from SLEEP Mode OTP ROM 4.11 The Initialized Values after Reset Table 11 The Summary of the Initialized Values for Registers Page EM78P458/459 OTP ROM X: not used. U: unknown or dont care. P: previous value before reset. t: check Table 5 4.12 Oscillator 1. Oscillator Modes 2. Crystal Oscillator/Ceramic Resonators (XTAL) Page 3. External RC Oscillator Mode 4. RC Oscillator Mode with Internal Capacitor OTP ROM 4.13 Power-on Considerations 1. External Power on Reset Circuit 2. Residue-Voltage Protection OTP ROM 4.14 CODE OPTION 1. Code Option Register (Word 0) 2. Code Option Register (Word 1) OTP ROM 4.15 Instruction Set OTP ROM 4.16 Timing Diagrams RESET Timing (CLK="0") TCC Input Timing (CLKS="0") AC Test Input/Output Waveform Page OTP ROM 6. ELECTRICAL CHARACTERISTICS 6.1 DC Electrical Characteristic(Ta=0C ~ 70 C, VDD=5.0V5%, VSS=0V) EM78P458/459 OTP ROM 6.2 AC Electrical Characteristic(Ta=0C ~ 70 C, VDD=5V5%, VSS=0V) *N= selected prescaler ratio. 6.3 A/D Converter Characteristic 6.4 Comparator(OP) Characteristic(Vdd = 5.0V,Vss=0V,Ta=0 to 70) EM78P458/459 APPENDIX